Commit Graph

92185 Commits

Author SHA1 Message Date
Ben Skeggs 92ee96d83d nv40: s/READ/WRITE/ 2007-12-30 15:24:16 +11:00
Ben Skeggs 6af6bb6817 nouveau: header update 2007-12-30 01:17:47 +11:00
Ben Skeggs 24cfb7d2e2 nv40: untested fragprog mods for big-endian chips 2007-12-30 01:03:24 +11:00
Ben Skeggs 09612416d7 nouveau: typo fix 2007-12-30 00:37:58 +11:00
Zou Nan hai d0ebdca4fa fix fd.o bug #13847 2007-12-29 15:28:51 +08:00
Roland Scheidegger 3956597962 Bug #13839: Fix 3D texture offset miscalculation with pixels versus bytes. 2007-12-28 18:05:22 -08:00
Dan Nicholson aecec3aced Merge branch 'autoconf2' 2007-12-28 15:14:32 -08:00
Xiang, Haihao aac2d99dc3 i915: reset swrast state after calling swrast DrawPixels.
In order to optimize DrawPixels, the i915 texenv program isn't
applied to swrast DrawPixels in the i915 driver. This causes this
program isn't applied to any following swrast functions. Resetting
the swrast state fixes this issue.  Fix #13614
2007-12-27 10:43:43 +08:00
Ben Skeggs 8ed3a69fc8 nouveau: remove legacy stuff 2007-12-27 09:09:11 +11:00
Dan Nicholson 2b440d5461 Merge branch 'master' into autoconf2 2007-12-26 15:41:24 -06:00
Dan Nicholson ab57cbaccc autoconf: Helper options for adding GCC 32/64 bit flags
Two new configure options to add -m32 or -m64 to the CFLAGS and CXXFLAGS
when GCC is in use. By default, the user supplied options are
environment variables are respected, but these options are quick helps
for the common case of x86/x86_64 using GCC.
2007-12-26 15:38:30 -06:00
Ben Skeggs dc6d73e1a4 nouveau: track last validated offsets, so we know when relocs can be avoided. 2007-12-27 06:22:28 +11:00
Ben Skeggs 3b8efe1dfe nouveau: allow unfenced read of buffers in a few situations 2007-12-27 06:10:49 +11:00
Ben Skeggs a794fcfbdb nouveau: remove fence_del(), _ref() can be used for the same purpose. 2007-12-27 06:02:01 +11:00
Ben Skeggs f33467d72a nouveau: header update 2007-12-26 00:56:00 +11:00
Ben Skeggs e32e0e2b8e nv40: use index buffers rather than inline indices.
We probably want to use inline indices in some situations still, but this
commit's primary purpose is to workaround some mis-rendering caused by a
more complicated problem that'll get fixed eventually.
2007-12-26 00:37:21 +11:00
Xiang, Haihao b422e5ad37 i915: apply commit a0a5e8cfc0 from 965.
fix #11925
2007-12-25 17:22:19 +08:00
Xiang, Haihao cf46aee14a mesa: fix a bad cast in put_values_z24.
The values passed to put_values_z24 are GLuint,
not GLubyte. fix #13543
2007-12-25 14:18:05 +08:00
Adam Jackson 166a828ddf __driConfigOptions must be PUBLIC. 2007-12-24 19:16:24 -05:00
Alex Deucher 0b7e0f8159 R300: RV410 SE chips have half the pipes of regular RV410
This fixes 3D rendering on x700 SE chips.  Reported
by Kano.
2007-12-24 11:59:27 -05:00
Zack Rusin f9e0e2b3ef i965: a little better way of handling immediates 2007-12-24 07:57:34 -05:00
Ben Skeggs d732728590 nouveau: pushbuf code, now with 50% less suck!
Far more efficient, if not a bit more complicated.  Hopefully not too
buggy still.

This commit will potentially expose some unrelated bugs, fixes for them
will follow "real soon now".
2007-12-24 19:28:36 +11:00
Ben Skeggs f9cfc32376 nv40: ensure all required buffers are accounted for during state validation 2007-12-24 18:53:41 +11:00
Dan Nicholson 4c5a2b3af2 autoconf: Documentation for using the autoconf'd build
Most of the options available from configure are documented on the
autoconf.html. This page is reached as an alternative provided on the
install.html page. An FAQ about why there is no configure script has
been removed.
2007-12-23 16:38:18 -08:00
Ben Skeggs 5fcffcd312 nouveau: speed up user buffers.
Try and fit user buffers into a small GART scratch area at validate time,
instead of going to a lot of effort to fit these (mostly) use-once-and-discard
objects into VRAM.
2007-12-23 17:06:18 +11:00
Ben Skeggs 7372a596a9 nv40: seems we have stencil faces around the wrong way. 2007-12-23 16:19:25 +11:00
Ben Skeggs 74757eb970 nouveau: don't wait when deleting fences unless needed 2007-12-23 16:18:00 +11:00
Ben Skeggs fa605cf661 nouveau: some cleanups 2007-12-23 16:17:22 +11:00
Ben Skeggs b4b002661e nouveau: match gallium changes 2007-12-23 16:05:02 +11:00
Ben Skeggs 6c14cf5834 Merge branch 'upstream-gallium-0.1' into darktama-gallium-0.1 2007-12-23 16:01:59 +11:00
Roland Scheidegger 26473140b9 fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527)
primitive needs to include the begin/end flags (broken since vbo-0.2). Should
fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon,
s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527.
2007-12-22 18:54:18 +01:00
Kristian Høgsberg 2f3e939ae7 Silence compiler warnings from XML error macros. 2007-12-21 15:31:00 -05:00
Eric Anholt 9136e1f2c8 [965] Fix and enable separate stencil.
Note that this does not enable GL_EXT_stencil_two_side, because Mesa's computed
_TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to
GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints.
2007-12-21 11:50:00 -08:00
Eric Anholt 9e68e191ac [intel] Move some pixel path support from drivers to shared. 2007-12-21 11:41:46 -08:00
Xiang, Haihao f8830a1bf7 intel: cast a pointer to unsigned long, avoid potential error. 2007-12-21 17:03:55 +08:00
Eric Anholt bea6b5fe5a [965] Enable EXT_framebuffer_object.
To do so, merge the remainnig necessary code from the buffers, blit, span, and
screen code to shared, and replace it with those.
2007-12-20 11:32:55 -08:00
Eric Anholt 106f398220 [965] Actually enable SGIS_generate_mipmap. 2007-12-20 11:28:10 -08:00
Eric Anholt 101abee6c4 [intel] Fix and reenable (software) SGIS_generate_mipmap
The core problem was that _mesa_generate_mipmap was not respecting RowStride
of the source image.  Additionally, the intel private data associated with the
images (level and face) was not being initialized for the
_mesa_generate_mipmap-generated images.
2007-12-20 11:26:34 -08:00
Zack Rusin 4fa7afabc9 i965: very crude and hacky way of handling immediates 2007-12-20 12:54:23 -05:00
Eric Anholt b2f62609d0 [intel] Allow driver hooks to be NULL in intel_buffers.c and just update flags.
The 965 driver relies on flag checking instead of these hooks, and will be
using this code soon.
2007-12-20 08:24:45 -08:00
Eric Anholt fcd1e9dad6 [i915] Move meta_draw_quad into the vtbl with other meta operations. 2007-12-20 08:19:42 -08:00
Brian 2761cfce46 return correct size from glGetActiveUniform (bug 13751) 2007-12-20 09:06:05 -07:00
Keith Whitwell a85535b7cb gallium: make state tracker explictly ask for rendercache flushes 2007-12-20 13:47:46 +00:00
Keith Whitwell 9e41d547db 965: respect pipe flush flags
Now we emit way too many flushes instead of none at all.
2007-12-20 13:47:11 +00:00
Keith Whitwell 21c67b70d4 gallium: translate ARB fp/vp immediates consistently to tgsi immediates 2007-12-20 13:20:27 +00:00
Zack Rusin ebf78c0dcc 965: fix the constant buffers 2007-12-20 07:05:52 -05:00
Xiang, Haihao e543292335 i915: avoid dead lock in intel_meta_draw_poly. fix #13696 2007-12-20 16:49:25 +08:00
Brian e9207430ce Add some prototype code for converting RET to END for main(). Disabled for now. 2007-12-19 14:06:22 -07:00
Brian 4a1776a763 temporarily defeat an assertion 2007-12-19 13:53:28 -07:00
Brian c664302c3e Fix problem with initial viewport/scissor size.
If an app never called glViewport, the viewport size was always 0 by 0 pixels.
Now pass initial size to st_create_framebuffer() and initialize the viewport
and scissor bounds in st_make_current().
This could also be fixed by ensuring the gl_framebuffers passed to
_mesa_make_current() were initialized to the right size.  But that involves
allocating the renderbuffers/pipe_surfaces earlier and that runs into some
other issues ATM.
Also remove obsolete createRenderbuffers param to st_create_framebuffer().
2007-12-19 13:45:00 -07:00