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Author SHA1 Message Date
Tomeu Vizoso 7eb2bc8f52 pan/decode: Properly print tripped zeroes 
The "%" got lost.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Fixes: 6148d1be4b ("panfrost: Fix size of bifrost sampler descriptor")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:46 +02:00
Tomeu Vizoso 3a81abf3b2 panfrost: Add Bifrost texture trampoline BO to batch 
Fixes: d3eb23adb5 ("panfrost: Emit sampler descriptor on bifrost")
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:40 +02:00
Alyssa Rosenzweig c46731527a pan/bi: Lower for now sincos 
Will be implemented later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:36 +02:00
Tomeu Vizoso 3baf251487 panfrost: mali_attr_meta.unknown1 is zero on Bifrost 
For unknown1 reasons :)

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:32 +02:00
Tomeu Vizoso c4400b05be panfrost: GPUs newer than G-71 don't have swizzles... 
for attributes and varyings.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:28 +02:00
Tomeu Vizoso c409428006 pan/decode: Trace to stderr with PANDECODE_DUMP_FILE=stderr 
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:23 +02:00
Alyssa Rosenzweig d6588b87bf panfrost: Update Bifrost fields in mali_shader_meta 
Not much is known currently about these fields and their values, but
this gets things going in the scenarios we have been testing with so
far.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:19 +02:00
Tomeu Vizoso 07b31f3437 pan/bi: Print shaders only if BIFROST_MESA_DEBUG=shaders 
Similar to how it's done in the Midgard compiler.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:16 +02:00
Alyssa Rosenzweig 9c7d30fb4a pan/bi: Enable lower_mediump_outputs NIR pass 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:11 +02:00
Tomeu Vizoso 7104e28651 panfrost: Add a bit more info about some tiler fields 
Has been observed that after the job chain has completed, those fields
become populated.

tiler_heap_next_start contains an address inside the tiler heap, a bit
before the value that the GPU writes to tiler_heap_free.

used_hierarchy_mask contains a hex value that corresponds to values
observed as hierarchy masks.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:07 +02:00
Tomeu Vizoso 4d581a4bc6 panfrost: Create additional BO for the checksum of imported BOs (Bifrost) 
Similar to what the blob does. My reason for doing this was mainly so
traces weren't as different, which makes it more work to spot
relevant differences.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:52:03 +02:00
Tomeu Vizoso 28902ba87e panfrost: Split bit out of format.unk3 
On Bifrost traces, we can observe that this bit is always enabled.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4832>
 2020-05-01 16:51:36 +02:00
Samuel Pitoiset 7f130e76ea ci: add lists of expected failures & skipped tests for RAVEN with ACO 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4848>
 2020-05-01 16:07:47 +02:00
Andres Gomez 263ed2e777 scripts: remove unittest.mock dependency when not used 
Found upon inspection.

Signed-off-by: Andres Gomez <agomez@igalia.com
Reviewed-and-Tested-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4840>
 2020-05-01 15:01:51 +03:00
Samuel Pitoiset cc2c3b41b8 ci: fix reporting the number of unexpected/flakes 
`wc -l $file` returns the number of lines and the filename.

Fixes: b8c66aeb93 ("ci: Clean up some excessive use of pipes in dEQP results processing.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4829>
 2020-05-01 07:51:44 +00:00
Michel Dänzer 23daa49d4c gitlab-ci: Use YAML anchor for llvmpipe paths in virgl rules 
Instead of duplicating them.

Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4808>
 2020-05-01 07:19:05 +00:00
Rob Clark 60912f1ebd freedreno: we don't need aligned vbo's 
This gets rid of the last reason that mesa/st would use `u_vbuf` on
a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4812>
 2020-05-01 02:05:00 +00:00
Rob Clark 9a7c179473 freedreno/a6xx: add some more formats 
u_vbuf was translating these for us.. which isn't really necessary.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4812>
 2020-05-01 02:05:00 +00:00
Alyssa Rosenzweig 6f7d94580e pan/decode: Don't crash on missing payload 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig bde19c0e7b panfrost: Fix tiled texture "stride"s on Bifrost 
They're not real strides like linear textures but the hw does use them
so we do have to get it right annoyingly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig bbecbedb4c panfrost: Fix norm coords on bifrost sampler 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 401409eff3 panfrost: Fix sampler wrap/filter field orders 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 6148d1be4b panfrost: Fix size of bifrost sampler descriptor 
Should be 32-bytes, it looks like.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 884f869992 panfrost: Fix texture field size 
I have to imagine this was UB.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig d04be375cc pan/bit: Add round tests 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 6bbedf8359 pan/bit: Interpret ROUND 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig f1f4f1b816 pan/bit: Add framework forinterpreting double vs float 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 130a3fba1c pan/bi: Pack round opcodes (FMA, either 16 or 32) 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig 5f35cdaa8d pan/bi: Pipe multiple textures through 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Alyssa Rosenzweig fc634dc3b2 pan/bi: Add texture indices to IR 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4844>
 2020-05-01 00:27:23 +00:00
Rob Clark f8424d3b99 freedreno/a6xx: fix LRZ hang 
In detecting the case where we actually do need to re-emit LRZ state
(due to new batch), we were checking `ctx->last.dirty` to detect when
we cannot trust previous state.  But this is cleared before we check
it.

Move where it is cleared to the end of the draw_vbo() path.

Fixes: dfa702e94b ("freedreno/a6xx: limit LRZ state emit")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4842>
 2020-05-01 00:02:28 +00:00
Eric Anholt 0e51082cfa freedreno/ir3: Leave bools as 1-bit, storing them in full regs. 
If use NIR's 1-bit bool representation , we get exactly the bool behavior
the hardware provides: CMPS produces true or false, AND/OR/XOR work as
intended without extra absnegs, and we can pass those half values directly
to other CMPS.  We emit an absneg for b2b1 ("turn a memory load into a
1-bit NIR boolean"), but we would have done so for the ir3_n2b() on the
use of that value anyway.  The most awkward bit is that inot(a@1) is now a
sub(1, a), but we can encode the 1 as an immediate so it's fine.

No significant changes to GL_TIME_ELAPSED on my set of traces (n=21).

instructions in affected programs: 1570638 -> 1548702 (-1.40%)
nops in affected programs: 624053 -> 611381 (-2.03%)
non-nops in affected programs: 959061 -> 949797 (-0.97%)
mov in affected programs: 5258 -> 5252 (-0.11%)
cov in affected programs: 15099 -> 15902 (5.32%)
dwords in affected programs: 469600 -> 452768 (-3.58%)
last-baryf in affected programs: 162211 -> 154726 (-4.61%)
full in affected programs: 4881 -> 4797 (-1.72%)
sstall in affected programs: 173953 -> 174545 (0.34%)
(ss) in affected programs: 10922 -> 10934 (0.11%)
(sy) in affected programs: 728 -> 745 (2.34%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4518>
 2020-04-30 23:36:09 +00:00
Eric Anholt 769adc9546 freedreno/ir3: Drop redundant IR3_REG_HALF setup in ALU ops. 
It's set by ir3_put_dst() immediately after.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4518>
 2020-04-30 23:36:09 +00:00
Marek Olšák bdd2f284d9 radeonsi: revert an accidental change in si_clear_buffer 
The change was in: 7b0b085c94

Fixes: 7b0b085c94 ("radeonsi: drop the negation from fmask_is_not_identity")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 5afec9bc9f radeonsi: fix si_compute_clear_render_target with render condition enabled 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 19db1a540c radeonsi: add a workaround to fix KHR-GL45.texture_view.view_classes on gfx9 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák d6acdbd935 radeonsi: implement and use compute-based DCC decompression on gfx9-10 
DCC_DECOMPRESS doesn't work. Instead of trying to figure out why,
use a compute blit where the load is compressed and the store is
uncompressed.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák d3da73954a radeonsi: add SI_IMAGE_ACCESS_DCC_OFF to ignore DCC for shader images 
A shader-based DCC decompress pass will use this.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 93d5c86081 radeonsi: bind shader images after DCC is disabled for image stores 
This prevents an infinite recursion with a compute-based DCC decompression
when it restores shader images.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 44d27fd6fb radeonsi: clean up and deduplicate code around internal compute dispatches 
In addition to the cleanup, there are these changes in behavior:
- clear_render_target waits for idle after the dispatch and then flushes
  L0-L1 caches (this was missing)
- sL0 is no longer invalidated before the dispatch, because src resources
  don't use it
- sL0 is no longer invalidated after the dispatch if dst is an image

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák e58dcc47c3 radeonsi: unify and align down the max SSBO/TBO/UBO buffer binding size 
Rounding down the size fixes:
    KHR-GL45.enhanced_layouts.ssb_member_invalid_offset_alignment

Fixes: 03e2adc990

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák b7ffa1560c tgsi_to_nir: handle TGSI_OPCODE_BARRIER 
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák d35c3dc80e tgsi_to_nir: handle TGSI_SEMANTIC_BLOCK_SIZE 
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4761>
 2020-04-30 22:27:31 +00:00
Marek Olšák 2840bc3065 glthread: upload non-VBO vertices and indices for non-Indirect non-IBM draws 
This is basically the same thing u_vbuf does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
 2020-04-30 22:01:55 +00:00
Marek Olšák 1485a3ff7b glthread: handle gl{Push,Pop}ClientAttrib{DefaultEXT} for glthread states 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
 2020-04-30 22:01:55 +00:00
Marek Olšák 57bf51a973 glthread: handle POS vs GENERIC0 aliasing 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
 2020-04-30 22:01:55 +00:00
Marek Olšák 09f94632e0 glthread: initialize VAOs properly 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
 2020-04-30 22:01:55 +00:00
Marek Olšák 47cf310a67 glthread: track primitive restart state 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
 2020-04-30 22:01:55 +00:00
Marek Olšák 9037005d60 glthread: track instance divisor changes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
 2020-04-30 22:01:55 +00:00
Marek Olšák c9c9f57b02 glthread: track pointers and strides for Pointer & EXT_dsa attrib functions 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4314>
 2020-04-30 22:01:55 +00:00