freedreno/ir3: Drop redundant IR3_REG_HALF setup in ALU ops.
It's set by ir3_put_dst() immediately after. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4518>
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@@ -733,12 +733,6 @@ emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
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dst[0] = ir3_n2b(b, dst[0]);
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}
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if (nir_dest_bit_size(alu->dest.dest) < 32) {
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for (unsigned i = 0; i < dst_sz; i++) {
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dst[i]->regs[0]->flags |= IR3_REG_HALF;
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}
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}
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ir3_put_dst(ctx, &alu->dest.dest);
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}
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