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17055 Commits

Author SHA1 Message Date
Ivan Avdeev
7271b8ee49 radv,radeonsi: disable compute queue for BC250 
BC250 is known to have non-functional compute queue. Thousands
for Vulkan CTS tests fail, and many games are known to have visual
glitches. RADV_DEBUG=nocompute is the known workaround for all these
issues.

Disable compute queue for this chip in both radv and radeonsi.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33116>
 2025-03-04 08:07:31 +00:00
Ivan Avdeev
ff6504d4c0 radv: add experimental support for AMD BC-250 board 
AMD BC-250 is a mining board based on an AMD APU with an integrated GPU
that kernel recognizes as Cyan Skillfish.

It is basically RDNA1/GFX10, but with added hardware ray tracing
support. LLVM calls it GFX1013, see
https://llvm.org/docs/AMDGPU/AMDGPUAsmGFX1013.html

Support for this GPU hasn't been extensively tested. Some games are
known to work, some non-trivial ray query compute and ray tracing
pipeline rendering works too. Q2RTX works.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33116>
 2025-03-04 08:07:31 +00:00
Martin Roukala (né Peres)
8fb80834ed radv/ci: add hawaii to CI 
This GPU is located in the same host as Tahiti, and was kindly donated
to the RADV project by Leonardo Frassetto (@DottorLeo).
It's good to finally making use of it, one year after receiving it \o/

On a side now, the skips are removed since they do not appear to be
reducing the chances of hanging once paired with the updated postamble
flushes.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33563>
 2025-03-03 19:42:21 +00:00
Martin Roukala (né Peres)
f4b1d62f00 radv/ci: reduce the timeout of vkcts-tahiti to a more sensible time 
The current runtime is just over 33 minutes, so no need for
multi-hour-long timeouts.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33563>
 2025-03-03 19:42:21 +00:00
Timur Kristóf
3f3a5d8068 radv: Use flush postamble on GFX7 with different flags. 
Flush caches at the end of each submission on GFX7.
This significantly improves stability on Hawaii
when running the CTS on multiple threads.

Keep previous behaviour on GFX6.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33563>
 2025-03-03 19:42:21 +00:00
Samuel Pitoiset
7f6e28db26 radv: fix re-emitting fragment output state when resetting gfx pipeline state 
When switching from pipeline to shader objects.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33840>
 2025-03-03 19:19:33 +00:00
Konstantin Seurer
6e3fc37d47 radv: Implement multidimensional ray query arrays 
This is technically a bug fix, but no sane developer would use this.
It's still nice to implement all corner cases.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32334>
 2025-03-03 12:07:47 +00:00
Konstantin Seurer
febc923a46 radv: Lower ray query vars to structs 
This is much cleaner than passing an index around it will allow
implementing multidimensional ray query arrays.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32334>
 2025-03-03 12:07:47 +00:00
Julia Zhang
79bb8e3455 radv: advertise VK_EXT_device_memory_report 
Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33088>
 2025-03-03 08:26:51 +00:00
Julia Zhang
f504ed9e73 radv: emit device memory report for device memory events 
Emit device memory report when radv create memory or free memory.

Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33088>
 2025-03-03 08:26:51 +00:00
Julia Zhang
313aa44bf1 radv: add obj_id to radeon_winsys_bo 
mem->bo->obj_id will be used by device memory report.

Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33088>
 2025-03-03 08:26:51 +00:00
Julia Zhang
900be035c8 radv: add import and export handle_type in radv_alloc_memory 
The import_handle_type and export_handle_type will be used to set the
memoryObjectId for memory report.

Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33088>
 2025-03-03 08:26:51 +00:00
Alyssa Rosenzweig
d2edb15454 radv: use VK_COPY_STR 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33826>
 2025-03-01 20:27:26 +00:00
Georg Lehmann
975be7ac5d ac/nir/mem_access_bit_sizes: split unaligned vec3 lds access to allow more read2/write2 
Foz-DB Navi21:
Totals from 77 (0.10% of 79377) affected shaders:
Instrs: 69787 -> 68745 (-1.49%); split: -1.51%, +0.02%
CodeSize: 367256 -> 360060 (-1.96%); split: -1.97%, +0.01%
VGPRs: 3896 -> 3880 (-0.41%)
Latency: 335403 -> 335297 (-0.03%); split: -0.11%, +0.08%
InvThroughput: 102766 -> 102931 (+0.16%); split: -0.09%, +0.25%
VClause: 1645 -> 1643 (-0.12%); split: -0.18%, +0.06%
SClause: 1434 -> 1433 (-0.07%)
Copies: 4280 -> 4283 (+0.07%); split: -0.56%, +0.63%
PreVGPRs: 2408 -> 2421 (+0.54%); split: -0.08%, +0.62%
VALU: 45557 -> 45646 (+0.20%); split: -0.10%, +0.29%
SALU: 6458 -> 6474 (+0.25%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33448>
 2025-03-01 18:26:54 +00:00
Georg Lehmann
8b2b3e5704 radv: remove outdated vectorize TODO 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33448>
 2025-03-01 18:26:54 +00:00
Georg Lehmann
7eb43c3b1c aco/optimizer: delete combine_and_subbrev 
This is now done in NIR. No Foz-DB changes on Navi21.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33761>
 2025-03-01 07:49:28 +00:00
Natalie Vock
237d8799be radv/rt: Limit monolithic pipelines to 50 stages 
Beyond that, monolithic pipelines just bloat to incredible sizes,
destroying compile times for questionable, if any, runtime perf benefit.

Indiana Jones: The Great Circle has more than 100 stages and takes
several minutes to compile its RT pipeline on Deck when using monolithic
compilation, and yet separate shaders still end up faster (probably
because instruction cache coherency in traversal is better).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33818>
 2025-02-28 16:22:45 +00:00
Natalie Vock
d5a2666ad9 aco/ra: Assert operands only clear their own id 
This is useful for debugging register assignment, as this case would
usually result in RA silently assigning the same register to multiple
temps at the same time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29576>
 2025-02-28 16:00:48 +00:00
Natalie Vock
1967b0f0c4 aco/tests: Add tests for precolored operands in different regs 
The first test verifies that, if possible, we don't emit unnecessary
renames/copies for temporaries where it's possible for them to stay
in their current register (if an operand is precolored to the register
the temporary is currently residing in).

The second test verifies that we correctly choose a non-clobbered
operand even if there is one fixed to the temporary's current register.
To minimize copies, we'll want to have the live copy of
%tmp0 in v[2] there, because v[0-1] gets overwritten.

The third test verifies that we add a copy to another free register and
rename if all possible precolored operands are clobbered.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29576>
 2025-02-28 16:00:48 +00:00
Natalie Vock
b8bcc8e5c5 aco/ra: Handle temps fixed to different regs in different operands 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29576>
 2025-02-28 16:00:48 +00:00
Natalie Vock
7a4775b396 aco/ra: Add option to skip renaming for parallelcopies 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29576>
 2025-02-28 16:00:48 +00:00
Natalie Vock
b339bcfa38 aco/ra: Use struct for parallelcopies 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29576>
 2025-02-28 16:00:48 +00:00
Natalie Vock
3f182bc1fa aco/ra: Use iterators for linear VGPR copy extraction 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29576>
 2025-02-28 16:00:48 +00:00
Georg Lehmann
ea3c04b535 radv/nir_lower_ray_queries: use nir_foreach_function_impl 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33770>
 2025-02-28 14:38:14 +00:00
Georg Lehmann
dec60f3337 radv/nir_apply_pipeline_layout: clean up progress handling 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33770>
 2025-02-28 14:38:14 +00:00
Samuel Pitoiset
3c81961c2e radv: enable DCC fast clears for 8bpp/16bpp on GFX11 
This was disabled during GFX11 bringup few years ago to follow RadeonSI,
but this is working just fine and RadeonSI also enabled it recently.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33756>
 2025-02-28 08:33:39 +00:00
Samuel Pitoiset
aa476f4b52 radv: check HTILE compression for depth/stencil images per level 
This might avoid some useless decompression passes/cache levels for
levels that can't be compressed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33665>
 2025-02-28 08:05:14 +00:00
Samuel Pitoiset
77913edd99 radv/meta: remove useless assertion in when copy VRS to HTILE 
The caller already checks that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33665>
 2025-02-28 08:05:13 +00:00
Samuel Pitoiset
0f0d471154 radv/meta: inline radv_meta_get_view_layer() 
The comment for 3D is also incorrect now because meta should never
bind a 3D image to the framebuffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33758>
 2025-02-28 07:40:56 +00:00
Samuel Pitoiset
9c70cee4dc radv: handle OOM error properly when selecting image modifier 
Do not need a "dumber solution".

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33758>
 2025-02-28 07:40:56 +00:00
Samuel Pitoiset
dd7dbbb0c9 radv: remove meaningless TODOs in radv_GetDeviceImageMemoryRequirements() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33758>
 2025-02-28 07:40:56 +00:00
Samuel Pitoiset
b8d070eeab radv: replace radv_image::shareable by vk_image::external_handle_types 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33758>
 2025-02-28 07:40:56 +00:00
Guilherme Gallo
11f8dffec4 ci/angle: remove USE_ANGLE variable 
Now that every ANGLE use is covered by tag consistency checks
(structured tagging), we don't need the USE_ANGLE flag anymore, because
if we have ANGLE_TAG set, it means that ANGLE is required in this job.

In detail, it means that the test job has inherited ANGLE_TAG from
`.container-builds-angle`.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33421>
 2025-02-28 01:33:34 +00:00
Guilherme Gallo
3b01d6e900 ci/angle: test-time structured tag checks 
Let's setup the CI to enable runner script to check if the ANGLE
binaries from the container/rootfs are matching the intended version.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33421>
 2025-02-28 01:33:34 +00:00
Lionel Landwerlin
f8af4b597e vulkan/runtime: store flags on descriptor set layouts 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33799>
 2025-02-27 13:26:58 +02:00
Daniel Schürmann
3c27a9f0e2 aco/tests: add more tests for chained branches 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33762>
 2025-02-27 10:40:01 +00:00
Daniel Schürmann
713396ec8e aco/assembler: Don't insert chained branches into otherwise empty blocks 
No fossil changes, but keeps block offsets of the empty blocks intact.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33762>
 2025-02-27 10:40:01 +00:00
Daniel Schürmann
6659db285a aco/assembler: Fix short jumps over chained branches 
If we insert

   <code>
   s_branch 1
   s_branch Target

at the end of some block, and later hide an additional chained branch
after the existing one, then we have to update the 's_branch 1' to
also jump over the newly added branch.

Fixes: cab5639a09 ('aco/assembler: chain branches instead of emitting long jumps')
Closes: #12673
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33762>
 2025-02-27 10:40:01 +00:00
Peyton Lee
2e46c41448 amd/gmlib: add gmlib for radeonsi 
radeonsi drivers can use gmlib to generate 3dlut used to do tonemapping.

Signed-off-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33731>
 2025-02-27 03:15:16 +00:00
Alyssa Rosenzweig
9a58a8257e treewide: Switch to nir_progress 
Via the Coccinelle patch at the end of the commit message, followed by

sed -ie 's/progress = progress | /progress |=/g' $(git grep -l 'progress = prog')
ninja -C ~/mesa/build clang-format
cd ~/mesa/src/compiler/nir && clang-format -i *.c
agxfmt

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    -return prog;
    +return nir_progress(prog, impl, metadata);

    @@
    expression prog_expr, impl, metadata;
    @@

    -if (prog_expr) {
    -nir_metadata_preserve(impl, metadata);
    -return true;
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -return false;
    -}
    +bool progress = prog_expr;
    +return nir_progress(progress, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, prog ? (metadata) : nir_metadata_all);
    -return prog;
    +return nir_progress(prog, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, prog ? (metadata) : nir_metadata_all);
    +nir_progress(prog, impl, metadata);

    @@
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, metadata);
    -return true;
    +return nir_progress(true, impl, metadata);

    @@
    expression impl;
    @@

    -nir_metadata_preserve(impl, nir_metadata_all);
    -return false;
    +return nir_no_progress(impl);

    @@
    identifier other_prog, prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    -other_prog |= prog;
    +other_prog = other_prog | nir_progress(prog, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +nir_progress(prog, impl, metadata);

    @@
    identifier other_prog, prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -other_prog = true;
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +other_prog = other_prog | nir_progress(prog, impl, metadata);

    @@
    expression prog_expr, impl, metadata;
    identifier prog;
    @@

    -if (prog_expr) {
    -nir_metadata_preserve(impl, metadata);
    -prog = true;
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +bool impl_progress = prog_expr;
    +prog = prog | nir_progress(impl_progress, impl, metadata);

    @@
    identifier other_prog, prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -other_prog = true;
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +other_prog = other_prog | nir_progress(prog, impl, metadata);

    @@
    expression prog_expr, impl, metadata;
    identifier prog;
    @@

    -if (prog_expr) {
    -prog = true;
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +bool impl_progress = prog_expr;
    +prog = prog | nir_progress(impl_progress, impl, metadata);

    @@
    expression prog_expr, impl, metadata;
    @@

    -if (prog_expr) {
    -nir_metadata_preserve(impl, metadata);
    -} else {
    -nir_metadata_preserve(impl, nir_metadata_all);
    -}
    +bool impl_progress = prog_expr;
    +nir_progress(impl_progress, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, metadata);
    -prog = true;
    +prog = nir_progress(true, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -}
    -return prog;
    +return nir_progress(prog, impl, metadata);

    @@
    identifier prog;
    expression impl, metadata;
    @@

    -if (prog) {
    -nir_metadata_preserve(impl, metadata);
    -}
    +nir_progress(prog, impl, metadata);

    @@
    expression impl;
    @@

    -nir_metadata_preserve(impl, nir_metadata_all);
    +nir_no_progress(impl);

    @@
    expression impl, metadata;
    @@

    -nir_metadata_preserve(impl, metadata);
    +nir_progress(true, impl, metadata);

squashme! sed -ie 's/progress = progress | /progress |=/g' $(git grep -l 'progress = prog')

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33722>
 2025-02-26 15:19:53 +00:00
David Rosca
fd3f297eb5 radeonsi/vcn: Add UDT support for VCN5 
UDT uses decode target buffers directly as references.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33641>
 2025-02-26 13:07:10 +00:00
David Rosca
6695eeaf42 ac/surface: Allow DCC for multi-plane formats on GFX12 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33598>
 2025-02-26 11:31:27 +00:00
David Rosca
e9341be246 ac/surface: Only allow linear modifier for subsampled 422 formats 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33598>
 2025-02-26 11:31:27 +00:00
Xaver Hugl
4b663d561b vulkan/wsi: implement support for VK_EXT_hdr_metadata on Wayland 
Signed-off-by: Xaver Hugl <xaver.hugl@kde.org>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Sebastian Wick <sebastian.wick@redhat.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32038>
 2025-02-25 21:24:11 +00:00
Georg Lehmann
9f40d06d2d radv: use nir_opt_phi_to_bool 
Foz-DB Navi21:
Totals from 5238 (6.60% of 79377) affected shaders:
MaxWaves: 112653 -> 112805 (+0.13%)
Instrs: 8008658 -> 8008518 (-0.00%); split: -0.18%, +0.18%
CodeSize: 42632748 -> 42650584 (+0.04%); split: -0.16%, +0.20%
VGPRs: 293296 -> 292672 (-0.21%); split: -0.22%, +0.01%
SpillSGPRs: 1958 -> 2066 (+5.52%); split: -0.66%, +6.18%
SpillVGPRs: 2934 -> 2896 (-1.30%)
Latency: 77959669 -> 77957296 (-0.00%); split: -0.10%, +0.10%
InvThroughput: 20650753 -> 20585680 (-0.32%); split: -0.39%, +0.08%
VClause: 164769 -> 164979 (+0.13%); split: -0.14%, +0.27%
SClause: 237718 -> 237731 (+0.01%); split: -0.03%, +0.03%
Copies: 643403 -> 634147 (-1.44%); split: -1.83%, +0.39%
Branches: 234353 -> 233990 (-0.15%); split: -0.30%, +0.15%
PreSGPRs: 291935 -> 293893 (+0.67%); split: -0.01%, +0.68%
PreVGPRs: 245802 -> 245241 (-0.23%); split: -0.23%, +0.00%
VALU: 5145144 -> 5133006 (-0.24%); split: -0.38%, +0.14%
SALU: 1178442 -> 1189578 (+0.94%); split: -0.19%, +1.13%
VMEM: 343288 -> 343994 (+0.21%); split: -0.02%, +0.23%
SMEM: 354275 -> 354273 (-0.00%); split: -0.00%, +0.00%

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33498>
 2025-02-25 20:38:09 +00:00
Samuel Pitoiset
c3884f7f1e radv: reserve bits explicitly for cache key structs 
Having explicit reserved bits for those structs will make compiler
change backports easier and more robust regarding precompiled shaders
on SteamDeck.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33706>
 2025-02-25 13:52:18 +00:00
Hans-Kristian Arntzen
13a3f9a972 radv: Always set 0 dispatch offset for indirect CS. 
Fixes severe glitching in Avowed.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33732>
 2025-02-25 12:17:11 +00:00
Samuel Pitoiset
67c150bf9e radv: fix missing SQTT barriers for fbfetch color/depth decompressions 
SQTT layout transitions need to be inside SQTT barrier. Otherwise, this
throws an assertion in RADV and might also crash when the capture is
opened with RGP.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12664
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33719>
 2025-02-25 10:18:42 +00:00
Samuel Pitoiset
c64b8c8401 radv: stop computing the UUID using the physical device cache key 
Otherwise, the UUID changes for games that have shader-based drirc
workarounds and this breaks precompiled shaders on SteamDeck.

Instead, use this pdev cache key to compute the logical device hash
which is common to all pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33717>
 2025-02-25 07:59:02 +00:00
Natalie Vock
14b902c825 radv/rt: Don't allocate the traversal shader in a capture/replay range 
We never write the traversal shader address out to shader group handles,
so this is not necessary. On the flipside, it can cause conflicts if the
traversal shader is allocated in a range occupied by a replayed shader.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33711>
 2025-02-24 22:41:19 +00:00