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Author SHA1 Message Date
Alyssa Rosenzweig 776fa19db2 panfrost: Allow FPK on Valhall 
Reuse the logic from Bifrost for a performance win.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16748>
 2022-05-30 14:00:55 +00:00
Samuel Pitoiset 2981ee5c7b radv: init states from VkPipelineFragmentShadingRateState at only one place 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Samuel Pitoiset 8fdc4bf3ba radv: init states from VkPipelineDiscardRectangleState at only one place 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Samuel Pitoiset b36bee672f radv: init states from VkAttachmentSampleCountInfo at only one place 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Samuel Pitoiset 23ba9a6249 radv: init states from pColorBlendState at only one place 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Samuel Pitoiset 1dff2a9204 radv: use AMD values for computing blend related state 
This will allow to translate the function and factors earlier.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Samuel Pitoiset d423d1c683 radv: init states from VkPipelineRenderingCreateInfo at only one place 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Samuel Pitoiset 6e8e926e1b radv: init states from pDepthStencilState at only one place 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Samuel Pitoiset 8e9b3fabc5 radv: init states from pMultisampleState at only one place 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Samuel Pitoiset 1f8db57023 radv: copy viewport/scissor when initializing radv_viewport_info 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16672>
 2022-05-30 12:21:14 +00:00
Marcin Ślusarz 0f46a8fbfe anv: remove invalid copy/pasted comment 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16773>
 2022-05-30 11:46:13 +00:00
Marcin Ślusarz 34b5a717c0 anv: remove redundant code calculating dynamic states mask 
pipeline->dynamic_states is already set by anv_graphics_pipeline_init
since 231651fd89.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16773>
 2022-05-30 11:46:13 +00:00
David Heidelberg 092d03a90e ci/iris: skqp: remove flaking atlastext for TGL (gl version) 
gles version of atlastext was already removed due to same behavior

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16772>
 2022-05-30 10:50:12 +00:00
Tatsuyuki Ishi 250b6eb908 radv/ci: skip image.sample_texture.*_compressed_format* 
These tests are flaky due to missing barriers, exposed by 211db6d333
("radv: Fix redundant subpass barriers due to erroneous comparison").

Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16762>
 2022-05-30 09:18:38 +00:00
Tatsuyuki Ishi 6eb5a110dd radv/ci: Move transient_attachment_bit from fail to skip list 
These tests are flaky and should not be treated as expected-fail.

This also removes the duplicates from the fail list which was breaking CTS
runner.

Fixes: cd14431b8c ("radv/ci: skip dEQP-VK.fragment_operations.transient_attachment_bit")
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16762>
 2022-05-30 09:18:38 +00:00
Jesse Natalie a56d47b0ba microsoft/compiler: Fixup sampler derefs in tex instrs that don't *need* samplers 
Sometimes you can end up with tex instructions that have sampler deref srcs, even though
they don't need them, e.g. a txs. In this case, still fix up those derefs in the sampler
splitting pass rather than leaving them pointing to a typed sampler.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16639>
 2022-05-30 07:28:50 +00:00
Konstantin Seurer 8aecb3ed58 radv: Ignore transformOffset if transformData is 0 
There is also a hypothetical scenario where
transformData is 0 and transformOffset is not 0
and we end up reading from transformOffset because
transform_addr is not 0.
VkAccelerationStructureBuildRangeInfoKHR spec:

If VkAccelerationStructureGeometryTrianglesDataKHR::transformData is not NULL, a single VkTransformMatrixKHR structure is consumed from VkAccelerationStructureGeometryTrianglesDataKHR::transformData, at an offset of transformOffset. This matrix describes a transformation from the space in which the vertices for all triangles in this geometry are described to the space in which the acceleration structure is defined.

Which I think means, that we should ignore
transformOffset if transformData is NULL.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16719>
 2022-05-30 00:00:53 +00:00
Konstantin Seurer 9be00573c4 radv: Fix handling of primitiveOffset 
VkAccelerationStructureBuildRangeInfoKHR spec:
If the geometry uses indices, primitiveCount × 3 indices are consumed from VkAccelerationStructureGeometryTrianglesDataKHR::indexData, starting at an offset of primitiveOffset. The value of firstVertex is added to the index values before fetching vertices.

If the geometry does not use indices, primitiveCount × 3 vertices are consumed from VkAccelerationStructureGeometryTrianglesDataKHR::vertexData, starting at an offset of primitiveOffset + VkAccelerationStructureGeometryTrianglesDataKHR::vertexStride × firstVertex.

Meaning: We always add firstVertex * vertexStride
to the vertex address and add primitiveOffset
either to the vertex address or the index address,
depending on wether indices are used.

Also add missing handling with instances.

Fixes: 0dad88b ("radv: Implement device-side BVH building.")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16719>
 2022-05-30 00:00:53 +00:00
SureshGuttula f2e3646321 Revert "radeonsi: Set display_remote for non-refernced frames" 
This reverts commit ef76b83633.
Reason for revert: This only helps in using I MBs.To further
fix in dpb , reverting this.

Fix added : https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16745

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16744>
 2022-05-29 00:07:47 +00:00
Jesse Natalie 55f9ff03c2 d3d12: Fix forward decl for sw_winsys 
Closes part of: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4099

Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16760>
 2022-05-29 00:00:19 +00:00
SureshGuttula 77a6feff89 radeonsi/vcn : update enc->dpb ref_use for index 0 
Currently dpb_enc referneces not updated properly when index 0, as
we are skipping clearing that ref.

This patch will fix this for index 0. So that when ever we set
non_referenced flag, that is not used as ref and not pushed to DPB.
This is helping in SVC encoding.

Signed-off-by: SureshGuttula <suresh.guttula@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16745>
 2022-05-28 15:52:53 +00:00
Lionel Landwerlin 09caa8902c anv: move internal RT shaders to the internal cache 
Those shaders are just like the blorp ones.

v2: Use a single internal cache for blorp/RT (Jason)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7f1e82306c ("anv: Switch to the new common pipeline cache")
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16741>
 2022-05-28 10:14:03 +00:00
Jason Ekstrand 0eee071038 panvk: Use the vk_buffer base struct 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16607>
 2022-05-27 18:39:00 -05:00
Jason Ekstrand 5d0b09be5b anv: Use the base vk_buffer struct 
This mostly gets us the vk_buffer_range() helper but may be useful in
the future.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16607>
 2022-05-27 18:38:57 -05:00
Jason Ekstrand f6ae21b864 vulkan: Add a base struct for buffers 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16607>
 2022-05-27 18:38:42 -05:00
Vinson Lee f38bc633f7 d3d12: Initialize d3d12_video_encoder_bitstream member m_uiOffset. 
Fix defect reported by Coverity Scan.

Uninitialized scalar field (UNINIT_CTOR)
uninit_member: Non-static class member m_uiOffset is not initialized in
this constructor nor in any functions that it calls.

Fixes: b171a6baa2 ("d3d12: Add video encode implementation of pipe_video_codec")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16682>
 2022-05-27 22:14:00 +00:00
Jason Ekstrand dfedeccc13 intel: Only set VectorMaskEnable when needed 
For cases with lots of very small primitives, this may improve
performance because we're not executing those dead channels all the
time.

Shader-db reports no instruction or cycle-count changes.  However, by
hacking up the driver to report when this optimization triggers, it
appears to affect about 10% of shader-db.

v2 (Kenneth Graunke): Always enable VMask prior to XeHP for now,
because using VMask on those platforms allows us to perform the
eliminate_find_live_channel() optimization.  However, XeHP doesn't
seem to have packed fragment shader dispatch, so we lose that
optimization regardless, and there's no reason not to avoid vmask.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1054>
 2022-05-27 21:52:48 +00:00
Erico Nunes 7c1498daba egl: Fix DETECT_OS macro usage 
As described in src/util/detect_os.h, the DETECT_OS macros are always
defined to a 0 or 1 value, and they should be used with #if rather
than #ifdef.
Commit 54b7227f15 accidentally disabled those extensions on all
platforms, so enable them again.

Fixes: 54b7227f15 ("egl/wgl: On win32, there is no support for EGL_EXT_device and EGL_EXT_platform_device")

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16751>
 2022-05-27 21:47:11 +02:00
Jason Ekstrand 0d28de212a anv: Don't disable the fragment shader if XFB is enabled 
It turns out that we need a fragment shader for streamout.  Whh?  From
Lionel's reading of simulator sources, it seems the streamout unit is
looking at enabled next stages.  It'll generate output to the clipper in
the following cases :

 - 3DSTATE_STREAMOUT::ForceRendering = ON
 - PS enabled
 - Stencil test enabled
 - depth test enabled
 - depth write enabled
 - some other depth/hiz clear condition

Forcing rendering without a PS seems like a recipe for hangs so it's
probably better to just enable the PS in this case.

Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
 2022-05-27 14:33:53 +00:00
Jason Ekstrand 73b3efcd59 anv: Handle the null FS optimization after compiling shaders 
Actually compile and cache the no-op fragment shader but remove it from
the pipeline if we determine it's a no-op.  This way we always have it
even if it's not strictly needed.

Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
 2022-05-27 14:33:53 +00:00
Jason Ekstrand 9fe6caf4e7 anv: Drop alpha_to_coverage from the NULL FS optimization 
Starting with Ivy Bridge, we implement alpha-to-coverage by writting
gl_SampleMask with a pattern based on alpha.  This will show up in
wm_prog_data::uses_omask so we don't need to look at the key.

Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
 2022-05-27 14:33:53 +00:00
Jason Ekstrand 1b9248e761 intel/fs: Copy color_outputs_valid into wm_prog_data 
Fixes: 36ee2fd61c ("anv: Implement the basic form of VK_EXT_transform_feedback")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
 2022-05-27 14:33:53 +00:00
Jason Ekstrand 8379993223 intel/fs: Drop fs_visitor::emit_alpha_to_coverage_workaround() 
It no longer exists.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16506>
 2022-05-27 14:33:53 +00:00
Mike Blumenkrantz 3394e81eb1 vtn: assert that composite members have the same bit size as the result 
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16667>
 2022-05-27 14:06:32 +00:00
Mike Blumenkrantz 54e1072ff6 vtn: assert that vector shuffle indices are in-bounds 
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16667>
 2022-05-27 14:06:32 +00:00
Alyssa Rosenzweig 01ba3460a9 pan/bi: Test CMP result_type optimization 
Add unit tests ensuring the optimization applies in all the cases we care about,
as functional integration tests (CTS and Piglit) won't test this. Also add unit
tests for a few cases where we specifically cannot fuse, in case these cases are
missed by the tests.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16725>
 2022-05-27 12:14:22 +00:00
Alyssa Rosenzweig 501a66cb5c pan/bi: Fuse result types 
In NIR, comparison instructions always produce 0/~0 results. For other result
types, a separate b2f32 or b2i32 instruction is used to transform the result.
However, Mali's comparison instructions have modifiers for these alternate
result types, so we can implement expressions like int(a < b) and float(a ==
b) in single instruction. Add a peephole optimization to fuse comparisons
with result type transformations.

Results on Mali-G52:

total instructions in shared programs: 2439696 -> 2434339 (-0.22%)
instructions in affected programs: 418703 -> 413346 (-1.28%)
helped: 1630
HURT: 0
helped stats (abs) min: 1.0 max: 28.0 x̄: 3.29 x̃: 2
helped stats (rel) min: 0.11% max: 19.35% x̄: 1.64% x̃: 1.39%
95% mean confidence interval for instructions value: -3.44 -3.13
95% mean confidence interval for instructions %-change: -1.72% -1.56%
Instructions are helped.

total tuples in shared programs: 1946581 -> 1943005 (-0.18%)
tuples in affected programs: 251742 -> 248166 (-1.42%)
helped: 1113
HURT: 11
helped stats (abs) min: 1.0 max: 32.0 x̄: 3.23 x̃: 2
helped stats (rel) min: 0.17% max: 15.38% x̄: 1.80% x̃: 1.38%
HURT stats (abs)   min: 1.0 max: 2.0 x̄: 1.45 x̃: 1
HURT stats (rel)   min: 0.21% max: 3.12% x̄: 1.23% x̃: 0.89%
95% mean confidence interval for tuples value: -3.35 -3.01
95% mean confidence interval for tuples %-change: -1.88% -1.66%
Tuples are helped.

total clauses in shared programs: 357791 -> 357349 (-0.12%)
clauses in affected programs: 15879 -> 15437 (-2.78%)
helped: 371
HURT: 3
helped stats (abs) min: 1.0 max: 8.0 x̄: 1.20 x̃: 1
helped stats (rel) min: 0.80% max: 33.33% x̄: 3.85% x̃: 2.17%
HURT stats (abs)   min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 2.94% max: 5.26% x̄: 4.49% x̃: 5.26%
95% mean confidence interval for clauses value: -1.27 -1.09
95% mean confidence interval for clauses %-change: -4.21% -3.36%
Clauses are helped.

total cycles in shared programs: 167922.04 -> 167810.71 (-0.07%)
cycles in affected programs: 6772.08 -> 6660.75 (-1.64%)
helped: 655
HURT: 12
helped stats (abs) min: 0.041665999999999315 max: 1.3333319999999986 x̄: 0.17 x̃: 0
helped stats (rel) min: 0.18% max: 20.00% x̄: 2.02% x̃: 1.60%
HURT stats (abs)   min: 0.041665999999999315 max: 0.125 x̄: 0.05 x̃: 0
HURT stats (rel)   min: 0.21% max: 3.80% x̄: 1.23% x̃: 0.88%
95% mean confidence interval for cycles value: -0.18 -0.16
95% mean confidence interval for cycles %-change: -2.10% -1.81%
Cycles are helped.

total arith in shared programs: 74393.17 -> 74243.08 (-0.20%)
arith in affected programs: 10157.50 -> 10007.42 (-1.48%)
helped: 1129
HURT: 12
helped stats (abs) min: 0.041665999999999315 max: 1.3333319999999986 x̄: 0.13 x̃: 0
helped stats (rel) min: 0.18% max: 50.00% x̄: 1.94% x̃: 1.40%
HURT stats (abs)   min: 0.041665999999999315 max: 0.125 x̄: 0.05 x̃: 0
HURT stats (rel)   min: 0.21% max: 3.80% x̄: 1.23% x̃: 0.88%
95% mean confidence interval for arith value: -0.14 -0.12
95% mean confidence interval for arith %-change: -2.06% -1.76%
Arith are helped.

total quadwords in shared programs: 1692019 -> 1688164 (-0.23%)
quadwords in affected programs: 216669 -> 212814 (-1.78%)
helped: 1148
HURT: 11
helped stats (abs) min: 1.0 max: 41.0 x̄: 3.37 x̃: 2
helped stats (rel) min: 0.17% max: 17.24% x̄: 2.25% x̃: 1.73%
HURT stats (abs)   min: 1.0 max: 2.0 x̄: 1.09 x̃: 1
HURT stats (rel)   min: 0.60% max: 1.32% x̄: 0.85% x̃: 0.83%
95% mean confidence interval for quadwords value: -3.49 -3.16
95% mean confidence interval for quadwords %-change: -2.33% -2.10%
Quadwords are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16725>
 2022-05-27 12:14:22 +00:00
Timur Kristóf 112a856813 nir: Keep track of cross-invocation mesh shader output access. 
On some implementations eg. AMD RDNA2 the driver can generate a
more optimal code path knowing whether outputs are indexed using the
local invocation index or not.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16736>
 2022-05-27 11:22:07 +00:00
Tatsuyuki Ishi cd14431b8c radv/ci: skip dEQP-VK.fragment_operations.transient_attachment_bit 
Until the CTS bug is fixed.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16663>
 2022-05-27 09:43:04 +00:00
Tatsuyuki Ishi 211db6d333 radv: Fix redundant subpass barriers due to erroneous comparison 
We accidentally compared the stencil layout to the color/depth layout.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16663>
 2022-05-27 09:43:04 +00:00
Yogesh Mohan Marimuthu 1a8b03732f vulkan/wsi: fix extra free if buffer_blit_queue 
In wsi_destroy_image(), if buffer_blit_queue then
do not call extra free. This will fix assert in
debug release and accessing out of allocated memory.

Fixes:
  7bd5aa111c
  ("vulkan/wsi: add a private transfer pool to exec the DRI_PRIME blit")

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset's avatarSamuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16649>
 2022-05-27 09:19:15 +00:00
Timur Kristóf 77a67f1115 radv: Add mesh and task stage names to pipeline executable properties. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16712>
 2022-05-27 08:46:29 +00:00
Timur Kristóf 8aff8d3dd4 nir: Add common task shader lowering to make the backend's job easier. 
1. Lowers NV_mesh_shader TASK_COUNT output to launch_mesh_workgroups.

2. Removes all code after launch_mesh_workgroups, enforcing the
fact that it's a terminating instruction.

3. Ensures that task shaders always have at least one
launch_mesh_workgroups instruction, so the backend doesn't
need to implement a special case when the shader doesn't have it.

4. Optionally, implements task_payload using shared memory when
task_payload atomics are used.
This is useful when the backend is otherwise not capable of
handling the same atomic features as it can for shared memory.
If this is used, the backend only has to implement the basic
load/store operations for task_payload.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16720>
 2022-05-27 07:52:03 +00:00
Timur Kristóf 9eaf918ed2 nir: Add new launch_mesh_workgroups intrinsic. 
The new intrinsic launches mesh shader workgroups
from a task shader, with explicit task_payload.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16720>
 2022-05-27 07:52:03 +00:00
David Heidelberg c9f0a511e0 ci/panfrost: add RoR and Nheko traces 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
 2022-05-27 06:51:38 +00:00
David Heidelberg da70c1b9f0 ci/virgl: traces: add RoR and Nheko traces 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
 2022-05-27 06:51:38 +00:00
David Heidelberg 0a9461caf5 ci/radeonsi: add RoR and Nheko traces 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
 2022-05-27 06:51:38 +00:00
David Heidelberg 2d42335fb8 ci/llvmpipe: add RoR and Nheko traces 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
 2022-05-27 06:51:38 +00:00
David Heidelberg 9f3c91850b ci/crocus: add RoR and Nheko traces 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
 2022-05-27 06:51:38 +00:00
David Heidelberg b19c858f3d ci/intel: add RoR and Nheko traces and reenable most of Valve traces 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16633>
 2022-05-27 06:51:38 +00:00