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Author SHA1 Message Date
Lionel Landwerlin 6dff50c8bc anv: fix dynamic buffers & independent sets 
In 0ca870c6f3 I forgot to fill the bind_map::dynamic_descriptors
array... Duh!

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 0ca870c6f3 ("anv: fix broken ray tracing dynamic descriptors")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38893>
 2025-12-11 08:32:32 +00:00
Georg Lehmann ef246aaf72 aco/isel: emit register copies for workgroup ids 
This way, we don't overestimate SGPR pressure.

Foz-DB Navi48:
Totals from 1413 (1.45% of 97637) affected shaders:
Instrs: 3468375 -> 3468585 (+0.01%); split: -0.01%, +0.02%
CodeSize: 18643064 -> 18643520 (+0.00%); split: -0.01%, +0.01%
VGPRs: 71776 -> 71788 (+0.02%)
SpillSGPRs: 18575 -> 18561 (-0.08%)
Latency: 23207643 -> 23207998 (+0.00%); split: -0.00%, +0.01%
InvThroughput: 8116806 -> 8116541 (-0.00%); split: -0.01%, +0.00%
VClause: 75250 -> 75252 (+0.00%); split: -0.00%, +0.00%
SClause: 65274 -> 65283 (+0.01%); split: -0.02%, +0.04%
Copies: 275750 -> 275942 (+0.07%); split: -0.03%, +0.10%
PreSGPRs: 70246 -> 69072 (-1.67%)
VALU: 1892111 -> 1892092 (-0.00%); split: -0.00%, +0.00%
SALU: 523460 -> 523648 (+0.04%); split: -0.02%, +0.05%
VOPD: 41097 -> 41102 (+0.01%)

Sadly the RA noise is slightly negative for instruction count.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830>
 2025-12-11 08:06:59 +00:00
Georg Lehmann 839a035564 aco/optimizer: propagate fixed regs to copy/extract/insert 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830>
 2025-12-11 08:06:58 +00:00
Georg Lehmann d32dd5e1df aco/optimizer: propagate fixed registers 
Foz-DB Navi48:
Totals from 351 (0.36% of 97637) affected shaders:
Instrs: 3568192 -> 3567166 (-0.03%)
CodeSize: 18890368 -> 18886304 (-0.02%)
Latency: 17047945 -> 17048185 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3185739 -> 3185813 (+0.00%); split: -0.00%, +0.00%
SClause: 61544 -> 61536 (-0.01%)
Copies: 271592 -> 270845 (-0.28%)
PreSGPRs: 17186 -> 17094 (-0.54%)
PreVGPRs: 21897 -> 21901 (+0.02%)
VALU: 2003976 -> 2003980 (+0.00%)
SALU: 468403 -> 467664 (-0.16%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830>
 2025-12-11 08:06:58 +00:00
Georg Lehmann b798ace443 aco/optimizer: fix skip_smem_offset_align with non temp register operands 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830>
 2025-12-11 08:06:58 +00:00
Georg Lehmann 911e1ce168 aco/isel: emit exec copy for ballot(true) 
Once copy propagated in the optimizer, this will allow
using nir_opt_uniform_subgroup without too many regressions.

Foz-DB Navi48:
Totals from 405 (0.41% of 97637) affected shaders:
Instrs: 3796716 -> 3796894 (+0.00%); split: -0.00%, +0.00%
CodeSize: 20116136 -> 20116652 (+0.00%); split: -0.00%, +0.00%
Latency: 18326661 -> 18327114 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3353206 -> 3353268 (+0.00%); split: -0.00%, +0.00%
Copies: 292307 -> 293830 (+0.52%)
SALU: 507523 -> 507738 (+0.04%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830>
 2025-12-11 08:06:58 +00:00
Georg Lehmann 72e3071751 aco/optimizer: keep pass_flags valid for all instructions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38830>
 2025-12-11 08:06:57 +00:00
Collabora's Gfx CI Team d8e9c669cb Uprev ANGLE to ee05836a4934129527544385203ecf420afc5dd1 
https://github.com/google/angle/compare/127a84404b88dbc4327ffb7f831a9a36c3b111bc...ee05836a4934129527544385203ecf420afc5dd1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38503>
 2025-12-11 00:09:04 +00:00
Sagar Ghuge 560b21fe49 anv/rt: Increment block count only for valid children 
If invalid childrens don't consume space in memory, we don't have to
increment the block count. HW unit just look at the bounding boxes and
reject them in intersection test.

Also, this patch handles invalid children type encoding.

Fixes: 198537039a ("anv/rt: reduce writes to block_incr_and_start_prim")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Tested-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38717>
 2025-12-10 23:16:30 +00:00
Connor Abbott f734dff419 tu: Fill render pass state when resuming 
We forgot to call tu_fill_render_pass_state when resuming because it was
mixed in with emitting commands for the start of the subpass. Fix that
by pulling it out. This adds some duplication, but I think it's better
than mixing command emission and CPU-side state setup in the same
function.

Fixes: cb0f414b2a ("tu: Add support for suspending and resuming renderpasses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38873>
 2025-12-10 22:43:10 +00:00
Mel Henning 2fab8fc297 nir: Use instr_clone in rematerialize_deref_in_block 
The previous implementation seems to predate nir_instr_clone() and
duplicates a lot of the deref cloning code. This also makes the pass
preserve deref->arr.in_bounds correctly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38856>
 2025-12-10 22:07:45 +00:00
Mel Henning dc44c0f32b treewide: Use nir_deref_instr_is_arr() 
Via coccinelle and some manual fixups.

@@
expression e1;
@@
- e1->deref_type == nir_deref_type_array || e1->deref_type == nir_deref_type_ptr_as_array
+ nir_deref_instr_is_arr(e1)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38856>
 2025-12-10 22:07:45 +00:00
Mel Henning 263a82f49b nir: Add nir_deref_instr_is_arr() helper 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38856>
 2025-12-10 22:07:44 +00:00
Michael Cheng 8ba197c9ef anv: Switch shaders to dedicated VMA allocator 
Switched to the new VMA allocator that provides explicit GPU VA
control via util_vma_heap.

This is architectural preparation for ray tracing capture/replay,
which requires the ability to reserve and allocate shaders at specific
VAs. The state pool's free-list design makes VA reservation difficult
to add, while the new chunk allocator is designed for explicit VA
management from the ground up.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
 2025-12-10 20:32:10 +00:00
Michael Cheng 1fa327ac32 anv: Add VMA allocator for shader binaries 
Introduce a VMA-first chunk allocator for shader binaries to eventually
replace the anv_state_pool-based implementation. This allocator works
directly with GPU virtual addresses through util_vma_heap, making the
virtual address space an explicit resource managed by ANV.

No functional change in this commit.

v2(Michael Cheng): Use existing instruction state pool anv_va_range

v3(Lionel): Simplify allocator

Signed-off-by: default avatarMichael Cheng <michael.cheng@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
 2025-12-10 20:32:10 +00:00
Lionel Landwerlin 20f320b7c7 anv: program STATE_BASE_ADDRESS instruction ptr using pdevice address 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
 2025-12-10 20:32:10 +00:00
Lionel Landwerlin 7cc9d8eec7 anv: fixup error path for shader allocation 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
 2025-12-10 20:32:10 +00:00
Lionel Landwerlin 567c1b3af4 anv: add missing device_memory_report for shaders 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
 2025-12-10 20:32:09 +00:00
Lionel Landwerlin efe60d2940 intel: remove unused show_shader_stage debug option 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
 2025-12-10 20:32:09 +00:00
Lionel Landwerlin 37789249a1 anv: fix internal representations of shaders 
The shader assembly was only available when not hitting the cache.

Additionally the serialized shader code was also the relocated variant
which meant that it could differ from one run to the next. Instead
serialize the unrelocated code produced by the compiler.

With this change we now decode the copy of the ISA we have on the
host.

NIR dumps are only available for shaders not loaded from the cache
(much like the other drivers).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8f4c2bd566 ("anv: add runtime shader statistic support")
Acked-by: Michael Cheng <michael.cheng@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869>
 2025-12-10 20:32:08 +00:00
Nanley Chery fe372f3b1b anv: Don't allow STORAGE + CCS for Y_TILED mod 
This can happen as a result of us adding on CCS to modifiers which don't
support it on gfx9-11.

Fixes image corruption seen with the following test:

   $ mpv av://lavfi:testsrc --config=no --vo=gpu-next --scale=ewa_lanczossharp --fs

Fixes: 01c4ea771c ("anv: Enable storage accesses with modifiers on gfx12+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12910
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38855>
 2025-12-10 20:09:09 +00:00
Caio Oliveira 7bd238fa5a brw: Properly set 'desc as register' for SEND in assembler 
The non-split SEND case was missing setting this.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38876>
 2025-12-10 19:46:52 +00:00
Marek Olšák 308da55f1a radv,radeonsi: use FRAG_RESULT_DUAL_SRC_BLEND 
this is slightly nicer

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38604>
 2025-12-10 19:16:46 +00:00
Marek Olšák 9a2f1be814 nir: add FRAG_RESULT_DUAL_SRC_BLEND and an option to use it 
This is potentially nicer for some drivers. AMD drivers will use it.

mesa_frag_result_get_color_index will be used often.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38604>
 2025-12-10 19:16:46 +00:00
Chia-I Wu ddd0b0c3a8 panvk: rework calculate_task_axis_and_increment 
We used to maximize threads_per_task, but that is ideal when the system
has a single gpu client. When there are multiple gpu clients, we want
smaller threads_per_task such that cores can be more fairly shared among
the clients.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Tested-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37988>
 2025-12-10 18:54:48 +00:00
Chia-I Wu 5fd32d79ee panvk: fix calculate_task_axis_and_increment 
task_axis selects the dim of the global workgroup, not the dim of the
local workgroup.

v2: fix assert for dEQP-VK.compute.pipeline.basic.empty_workgroup*

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Tested-by: Yiwei Zhang <zzyiwei@chromium.org> (v1)
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37988>
 2025-12-10 18:54:48 +00:00
Chia-I Wu 546d73721b panvk: set compute_ep_limit on v12+ 
Set compute_ep_limit to max_tasks_per_core on v12+. It is generally a
good idea to queue as many tasks as possible to better utilize the
cores.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Tested-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37988>
 2025-12-10 18:54:48 +00:00
Chia-I Wu bcd2e62ad0 panfrost: make RUN_COMPUTE.ep_limit configurable 
Since v12, RUN_COMPUTE.ep_limit specifies the size of the compute task
queue.  RUN_COMPUTE stalls when there are more tasks in the queue than
the specified ep_limit.

Sensible values are 0 (treated as 4), 4, or 16 (max_tasks_per_core).

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Tested-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37988>
 2025-12-10 18:54:48 +00:00
Yiwei Zhang c696ec3b73 venus: add missing VKAPI_ATTR/CALL 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14446
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38882>
 2025-12-10 18:11:07 +00:00
Aaron Ruby b17896f693 device-select-layer: Implement VkNegotiateLayerInterface::pfnGetDeviceProcAddr 
This must be implemented for loaderLayerInterfaceVersion >= 2. The only
interface that's allowed to be set to null is pfnGetPhysicalDeviceProcAddr.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38270>
 2025-12-10 17:36:21 +00:00
Pohsiang (John) Hsu 6173ff73c7 mediafoundation: remove unused templ and small code cleanup 
Reviewed-by: Yubo Xie <yuboxie@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857>
 2025-12-10 17:13:34 +00:00
Pohsiang (John) Hsu 23516579a8 mediafoundation: remove unneeded memset (~34KB for hevc) 
Reviewed-by: Yubo Xie <yuboxie@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857>
 2025-12-10 17:13:34 +00:00
Silvio Vilerino c0039ce657 d3d12: Prefer video encode suballocated buffer mode for subregion notification mode 
Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857>
 2025-12-10 17:13:33 +00:00
Pohsiang (John) Hsu d16b651fdd mediafoundation: add some end of function error logging for diagnosing error 
Reviewed-by: Yubo Xie <yuboxie@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857>
 2025-12-10 17:13:33 +00:00
Pohsiang (John) Hsu 47dc4b90e4 mediafoundation: propagate PrepareForEncode error up. 
Reviewed-by: Yubo Xie <yuboxie@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857>
 2025-12-10 17:13:33 +00:00
Pohsiang (John) Hsu 10138e5b42 mediafoundation: turn on slice auto on frames with dirty rect only 
Reviewed-by: Yubo Xie <yuboxie@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857>
 2025-12-10 17:13:32 +00:00
Yonggang Luo 095c2acf01 meson: do not reconstruct ICD paths 
This is a follow up of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20907/diffs?commit_id=b6a344f4baa1ee2c784ca74499dc9fe3b4519013

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38637>
 2025-12-10 14:46:11 +00:00
Yonggang Luo be4ad5c819 meson: Remove VK_ICD_FILENAMES totally from source tree. 
This is a follow up of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28516

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Gurchetan Singh <gurchetansingh@google.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> hk changes
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> for RADV changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38637>
 2025-12-10 14:46:11 +00:00
Dylan Baker 938fb7703e anv/video: Cast intentional read past end of struct member to void* 
Coverity notices that we read past the end of the array we're pointing
to, which is intentional, we want to copy additional members from the
source struct into the target pointer. As such, cast to a `void *`,
since this will make Coverity happy.

CID: 1649589
Fixes: 314de7af06 ("anv: Initial support for VP9 decoding")
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38438>
 2025-12-10 14:18:59 +00:00
Tapani Pälli c9bc373f7c crocus: add struct crocus_scissor_state to clamp values to 16bit 
This is a port of iris driver commit 193e494e6a to crocus.

Fixes: bc1a6b0a41 ("gallium: change pipe_scissor_state to 32 bit integer")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14428
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38862>
 2025-12-10 14:04:56 +00:00
Valentine Burley c56543874c zink/ci: Document recent Turnip flakes 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
 2025-12-10 13:32:08 +00:00
Georg Lehmann 621465e417 nir/opt_uniform_subgroup: handle more trivial shuffles/votes 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
 2025-12-10 13:32:08 +00:00
Georg Lehmann e648e551c1 nir/opt_uniform_subgroup: wire up mbcnt_amd path 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
 2025-12-10 13:32:08 +00:00
Georg Lehmann 5778436e99 nir/opt_uniform_subgroup: use nir_shader_intrinsics_pass 
Nothing here needs the recursion of the full lower_instructions pass.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
 2025-12-10 13:32:08 +00:00
Georg Lehmann 5f28bb72a7 nir/divergence_analysis: fix swizzle_amd without fetch inactive 
Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
 2025-12-10 13:32:08 +00:00
Georg Lehmann 1fc38d8539 nir/opt_uniform_subgroup: fix swizzle_amd without fetch_inactive 
Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
 2025-12-10 13:32:08 +00:00
Georg Lehmann e11d7f06d0 nir/opt_uniform_subgroup: don't try to optimize non trivial clustered reduce 
Fixes: 535caaf3e0 ("nir: Optimize uniform iadd, fadd, and ixor reduction operations")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867>
 2025-12-10 13:32:08 +00:00
Valentine Burley a265cdaa18 ci/deqp: Backport Android logcat commit 
Instead of manually applying the patch, backport the version that landed
in main, which requires a cmake argument to enable.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38071>
 2025-12-10 11:31:33 +00:00
Valentine Burley 4cbf5062b7 ci: Uprev GL & GLES CTS 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38071>
 2025-12-10 11:31:33 +00:00
Valentine Burley a65a7dbac9 ci: Uprev VKCTS 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38071>
 2025-12-10 11:31:31 +00:00