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Timur Kristóf 65bf4e7dcd radv: Require gang submit and compute for transfer queues 
RADV's transfer queue implementation will use compute for
the transfer operations that aren't supported by the SDMA,
so we'll need gang submissions for that.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39057>
 2025-12-23 12:14:58 +00:00
Timur Kristóf f481a5f887 radv: Add function to determine if SDMA supports an image. 
The following are not supported by SDMA:
- Sparse images (aka. PRT) on older GPUs
- Multisampled images

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39057>
 2025-12-23 12:14:58 +00:00
Timur Kristóf f55771a17d radv: Bypass L2 for gang semaphore BO with SDMA/ACE 
When the "gang leader" is SDMA, we need to ensure that the
gang semaphores BO is coherent between SDMA and CP.
To achieve this, we need bypass the L2 cache when either SDMA
or CP are connected to L2.

Suggested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39057>
 2025-12-23 12:14:58 +00:00
Linus Karl 7700ba28f5 ethos: fix build on non LP64 architectures 
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14310
Signed-off-by: Linus Karl <linus@lotz.li>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38592>
 2025-12-23 08:58:26 +00:00
Linus Karl 01cb7d7fd1 rocket: fix build on non LP64 architectures 
Cc: mesa-stable
Signed-off-by: Linus Karl <linus@lotz.li>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38592>
 2025-12-23 08:58:26 +00:00
Juan A. Suarez Romero 0cab626014 v3d: don't build disk cache access on shader disablement 
Don't build shader cache related functions when shader cache is disabled
on compile time.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14512
Backport-to: 25.3
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39064>
 2025-12-23 08:42:38 +00:00
Yuxuan Shui e0fbf9a908 wsi/display: Set atomic client cap in Acquire{Drm,Xlib}DisplayEXT as well. 
Since we use atomic mode setting now, the wsi->fd we use needs to have
the atomic client cap.

There are several different code paths where wsi can acquire a file
descriptor. For drm masters, the atomic client cap is set in
wsi_display_init_wsi. For leased drm fds, there are AcquireDrmDisplayEXT
and AcquireXlibDisplayEXT.

According to a comment we previously assumed wsi_display_get_connector
is common among all code paths, and that's why the atomic client cap was
set there. But that assumption can be broken based on the particular
order which the application invokes vulkan APIs in.

This commit simply push the drmSetClientCap to all entrypoints where a
drm fd comes through.

Fixes: 513ffea1d3 ("wsi/display: use atomic mode setting")
Signed-off-by: Yuxuan Shui <yshui@codeweavers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38987>
 2025-12-23 00:47:26 +00:00
Timur Kristóf 7dbabc6acc ac/nir/lower_taskmesh_io_to_mem: Use AC_TASK_DRAW_ENTRY_BYTES 
Replace draw_entry_bytes with AC_TASK_DRAW_ENTRY_BYTES.
This is 16 on all AMD HW that supports task/mesh shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39032>
 2025-12-22 15:17:59 +00:00
Timur Kristóf fc57fa4589 radv, radeonsi: Don't pass task ring info to mesh/task payload lowering 
The pass now uses the ring descriptors to figure these out.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39032>
 2025-12-22 15:17:59 +00:00
Timur Kristóf 4d381c9136 ac/nir/lower_taskmesh_io_to_mem: Don't hardcode payload entry size in shaders 
Currently the number of task payload entry size is hardcoded
in shaders as a constant. This isn't a good idea because it
makes the code inflexible, eg. doesn't allow us
to change the number of entries dynamically.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39032>
 2025-12-22 15:17:59 +00:00
Timur Kristóf 5348d953aa ac/nir/lower_taskmesh_io_to_mem: Don't hardcode num_entries in shaders 
Currently the number of task shader ring entries is hardcoded
in shaders as a constant. This isn't a good idea because it
makes the code inflexible, eg. prevents us from using the same
shader binary accross some chips as well as doesn't allow us
to change the number of entries dynamically.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39032>
 2025-12-22 15:17:58 +00:00
Pavel Ondračka 18331bf89d r300: enable guardband for draw 
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37977>
 2025-12-22 14:32:08 +00:00
Pavel Ondračka 0d4aa5f55f r300: pop-free clipping 
Ported from r600: fix pop-free clipping by Patrick Lerda

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37977>
 2025-12-22 14:32:08 +00:00
Pavel Ondračka 4d36c637dd r300: program explicit scissor around viewport 
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37977>
 2025-12-22 14:32:07 +00:00
Eric R. Smith 94093488eb pan: move pan_shader_update_info call for bifrost 
Doing it inside bifrost_compile lets us access the info
structure for more detailed shaderdb stats.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38961>
 2025-12-22 13:40:05 +00:00
Eric R. Smith 158be3dc1d pan: refactor shader info setting 
Move the update of pan_shader_info into its own function. For now this
does nothing, but it will allow us to update the info before printing
stats, which will be useful in the future.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38961>
 2025-12-22 13:40:04 +00:00
Eric R. Smith a25561b496 pan: pass pan_shader_info data to pan_stats_verbose 
This isn't very useful yet (the info isn't fully filled
out at the point of the call) so the printed values should
be viewed skeptically.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38961>
 2025-12-22 13:40:03 +00:00
Eric R. Smith f33ea9bee7 pan: prettier output when statsfull flag is set 
Also includes simple pipe stats (still need to get conditional pipeline
statistics)

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38961>
 2025-12-22 13:40:03 +00:00
Eric R. Smith 6ef79595a8 pan: pass a pointer to bi_compile_variant_nir, rather than a struct 
We need a subset of the pan_shader_info struct for each variant,
and previously we were building a struct containing that subset and
passing the struct to bi_compile_variant_nir. Instead we should pass
a pointer to the whole struct and let bi_compile_variant_nir build the
substructure. This is both more efficient, and also gives the stats
code access to the full information.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38961>
 2025-12-22 13:40:03 +00:00
Eric R. Smith 20e17ca864 pan: add actual register usage to the shaderdb stats 
Add the actual registers used (including uniforms used) by the shader
to stats. This is calculated by the stats gathering code, because the
scheduler and scoreboard passes run after register allocation and can
sometimes change the results.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38961>
 2025-12-22 13:40:03 +00:00
Eric R. Smith 2fdd6eb09e pan drm-shim: add a way to specify the GPU variant in PAN_GPU_ID 
This lets us compile shaders for different GPU variants on the PC.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38961>
 2025-12-22 13:40:03 +00:00
Eric R. Smith 036ec36cba pan: add variant to shader name for G310 variants 
So we will be able to distinguish them for testing.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38961>
 2025-12-22 13:40:03 +00:00
Samuel Pitoiset 3b18fa348e ac/rgp: enable new performance counters for RGP 2.6 on GFX10-GFX11 
GFX12 needs more work and it will be added separately.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:52:14 +01:00
Samuel Pitoiset 8bc37d0d19 ac/spm: add support for Ray Tracing counters in RGP 
These aren't new in RGP 2.6, they have been added since a while. But
because RADV wasn't supporting the new derived SPM chunk it wasn't
possible to expose them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:51:44 +01:00
Samuel Pitoiset 0b5ae0758e ac/spm: add support for new Memory percentage counters in RGP 2.6 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:51:14 +01:00
Samuel Pitoiset 3d2bb52a81 ac/spm: add support for new Memory bytes counters in RGP 2.6 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:50:44 +01:00
Samuel Pitoiset 84ecdc534c ac/spm: add support for new LDS counters in RGP 2.6 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:50:41 +01:00
Samuel Pitoiset 07d9fc574c ac/spm: implement the new derived SPM chunk for performance counters 
This is the new method to add performance counters to RGP captures.
This will be used to add the new RGP 2.6 counters too.

The previous SPM code will be deprecated at some point but it's hard
to support all generations in one batch. So, I will implement this
step by step.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:48:59 +01:00
Samuel Pitoiset 3e4d629458 ac/spm: add an ID to raw performance counters 
This will be used to compute derived values for the new RGP/SPM chunk.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:48:29 +01:00
Samuel Pitoiset 21ad7e4e32 ac/spm: print an error message when a group is unknown 
Help debugging.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:48:21 +01:00
Samuel Pitoiset 7da6fe6a00 ac/spm: fix programming more than one counter slot 
Some blocks have two or more SPM counters and they should be used when
more than 4 counters are programmed (ie. 16-bit per counter).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:48:14 +01:00
Samuel Pitoiset e5a041ee1c ac/spm: add an assertion to check the number of global instances 
To make sure counters aren't silently discarded.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:48:06 +01:00
Samuel Pitoiset eca9c00430 ac/spm: adjust configuration of some GPU blocks 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:47:58 +01:00
Samuel Pitoiset 6613dfb234 ac/perfcounter: add GCEA block description on GFX10-11 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:47:29 +01:00
Samuel Pitoiset 25e28819bd ac/perfcounter: adjust the number of events for TD on GFX10.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:47:21 +01:00
Samuel Pitoiset a4cb114f5a ac/perfcounter: add a separate group for GFX10.3 
This is just a copy&paste but GFX10.3 has way more counters than GFX10
that will be added later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39013>
 2025-12-22 09:47:09 +01:00
Samuel Pitoiset 044e7f6017 radv/nir: fix front_face opts for points/lines and unknown prim 
Fixes new VKCTS coverage dEQP-VK.glsl.builtin_var.frontfacing.*.

Fixes: af375c6756 ("radv: Optimize fs builtins using static gfx state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39041>
 2025-12-22 07:59:30 +00:00
Daniel Schürmann 7b1f6fa6fc aco: remove radeon_family from aco::Program 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:48 +00:00
Daniel Schürmann 1e8d367537 amd: add and use ac_cu_info::has_vtx_format_alpha_adjust_bug 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:48 +00:00
Daniel Schürmann febc29907c amd: add and use ac_cu_info::has_gfx6_mrt_export_bug 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:47 +00:00
Daniel Schürmann 7b7bdb76ab amd: add ac_cu_info::has_point_sample_accel flag and use in ACO 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:47 +00:00
Daniel Schürmann cfb745592d amd: add ac_cu_info::has_mad32 flag and use in ACO 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:47 +00:00
Daniel Schürmann 1e3db50170 aco: use additional flags from ac_cu_info 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:46 +00:00
Daniel Schürmann f7c4aa48a0 ac/gpu_info: add some more flags to ac_cu_info 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:46 +00:00
Daniel Schürmann f791e46c47 aco: add ac_cu_info to aco_compiler_options 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:46 +00:00
Daniel Schürmann addd4ea59f aco: pass aco_compiler_options to init_program() 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:46 +00:00
Daniel Schürmann bf9bec07c2 aco/tests: don't pass CHIP_UNKNOWN to ACO 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:46 +00:00
Daniel Schürmann 6f4e8046b5 ac/gpu_info: create separate function ac_fill_cu_info() to fill out CU info 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:45 +00:00
Daniel Schürmann 749c619c45 ac/gpu_info: correct some SGPR and VGPR allocation values in ac_cu_info 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:45 +00:00
Daniel Schürmann 553b431aca ac/gpu_info: move some CU information into separate struct ac_cu_info 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38701>
 2025-12-22 07:34:44 +00:00