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Author SHA1 Message Date
Timur Kristóf 62ff2ff808 aco: Move s_setprio to correct place after the gs_alloc_req. 
Previously the setprio was inside the branch, so it would only reset
the priority on the first wave, but not the others.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Timur Kristóf 277f37d036 aco: Use 24-bit multiplication for NGG wave id and thread id. 
Both of them should always fit 24 bits anyway.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Timur Kristóf eafc1e7365 aco: Use 24-bit multiplication in TCS I/O 
The TCS inputs and outputs must always fit into the LDS,
which implies that their addresses also always fit 24 bits.

On AMD GPUs, 24-bit multiplication is much faster than 32-bit
multiplication, so we can take the opportunity to use that
for TCS I/O instead.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Timur Kristóf 64332a0937 aco: Const correctness for aco_print_ir. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Timur Kristóf 0c0691d43e aco: Const correctness for get_barrier_interaction. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Timur Kristóf f321dc33c8 aco: Abort when RA can't find a register. 
Previously, it was just unreachable, which means it will generate
invalid shaders when it encounters a situation when it can't allocate
registers for eg. a large load.

This commit makes it slightly easier to notice such problems without
triggering a GPU hang.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Timur Kristóf f2e7aee244 aco: Increase barrier_count to 7 to include barrier_barrier. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Timur Kristóf 25775d346c aco: Only store TCS outputs to VMEM when they are read by TES. 
Totals from affected shaders (GFX10):
Code Size: 10832 -> 10736 (-0.89 %) bytes

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Timur Kristóf b779d05d71 radv: Add inputs read by TES to radv_shader_info. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4536>
 2020-04-24 17:58:57 +00:00
Jonathan Marek c3ef0275c4 turnip: add adreno 650 
Tile alignment is 96, with gmem alignment of 0x6000

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
 2020-04-24 17:42:01 +00:00
Jonathan Marek aa3624b8ab turnip: use RESOLVE_TS event 
This is required on a650 to flush the GMEM store.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
 2020-04-24 17:42:01 +00:00
Jonathan Marek f81e56c9a0 turnip: remove unused RB_UNKNOWN_8E04_blit 
New blit code doesn't change this value, and different values seem to be
related to the driver version and not the GPU version.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4608>
 2020-04-24 17:42:01 +00:00
Mike Blumenkrantz c683138689 zink: set UBO alignments in nir_intrinsic_load_uniform lowering 
resolves this error
  error: nir_intrinsic_align_offset(instr) < nir_intrinsic_align_mul(instr) (../src/compiler/nir/nir_validate.c:582)
in ext_packed_depth_stencil-readdrawpixels piglit test

port of f5b14d983e

Fixes: fb64954d9d ("nir: Validate that memory load/store ops work on whole bytes")
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4711>
 2020-04-24 17:27:30 +00:00
Fritz Koenig 155033bbb3 freedreno: allow FMT6_8_UNORM as a UBWC format 
FMT6_8_UNORM is necessary for NV12 textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4722>
 2020-04-24 17:10:39 +00:00
Jason Ekstrand 9c2a11430e spirv: Rewrite CFG construction 
This commit completely rewrites the way we extract a structured CFG from
SPIR-V.  The new approach is different in a few ways:

 1. It does a breadth-first search instead of depth-first.  This means
    that we've visited the merge node for a construct before we visit
    any of the nodes inside the construct.  This makes it easier to
    validate things like loop and switch nesting.

 2. We record more information in the CFG.  Earlier commits added a
    parent pointer to vtn_cf_node but we now record all of the merge and
    other special blocks for each CFG node.  This lets us validate
    things more precisely.

 3. It makes heavy use of merge blocks for walking the CFG.  Previously,
    we sort of used them as hints for trying to guess the CFG structure
    but things got dicey whenever a merge was missing.  We had some
    heuristics for how to handle short-circuiting if statements but it
    was a bunch of special cases.

    Now, we make them a fundamental part of walking the CFG.  When we
    encounter a control-flow construct, we add the body components of
    the construct to the BFS work list and then jump to the merge block
    if one exists to continue scanning the current CFG nesting level.
    If no merge block exists, we assume that means that control-flow
    never re-converges in a normal way and that the only way to get back
    to normality is with a direct jump such as a loop break or continue.
    This should make things far more robust when trying to deal with the
    more creative placement (or lack thereof) of merge instructions.

Reviewed-by: Alan Baker <alanbaker@google.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3820>
Closes: #2760
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4446>
 2020-04-24 16:29:24 +00:00
Jason Ekstrand 80ffbe915f anv: Add support for HiZ+CCS 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:45 +00:00
Jason Ekstrand 752eefdb3d intel/isl: Refactor isl_surf_get_ccs_surf 
This refactor breaks out a new isl_surf_supports_ccs function which does
most of the validity checking.  The isl_surf_get_ccs_surf function calls
this function and then dives right into constructing the CCS aux_surf.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:45 +00:00
Jason Ekstrand 3eb1993625 intel/isl: Delete a misleading comment 
Untyped messages are only use on Gen9+ for UBOs and SSBOs.  They will
never be used on anything using an isl_surf.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:45 +00:00
Jason Ekstrand 483a1d5e6c anv/cmd_buffer: Move anv_image_init_aux_tt higher 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:45 +00:00
Jason Ekstrand 65e541ab16 anv: Simplify a case in layout_to_aux_usage 
If it's depth, the only possible value of planes[plane].aux_usage is
ISL_AUX_USAGE_HIZ at least right now.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:45 +00:00
Jason Ekstrand 5cb6c5d11d intel/blorp: Allow more HiZ usages in hiz_clear_depth_stencil 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:45 +00:00
Jason Ekstrand 0d91dae7f0 anv: Generalize some aux usage checks 
For the checks dealing with fast-clear values, we change them to check
for the depth aspect because the distinction there really is between
color and depth more than between HiZ and CCS.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:45 +00:00
Jason Ekstrand 86ded00c40 anv/blorp: Do less hard-coding of aux usages 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:44 +00:00
Jason Ekstrand 54b525caf0 anv: Rework anv_layout_to_aux_state 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:44 +00:00
Jason Ekstrand eb0cede586 anv: Be more conservative about image view usage 
We were ORing together the image and stencil usage rather than actually
following the formula in the spec.  This can lead to assertions in other
parts of the driver if we're not careful.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:44 +00:00
Jason Ekstrand d2f3576d33 anv: Move vk_image_layout_is_read_only higher 
While we're at it, we drop some _KHR suffixes

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:44 +00:00
Jason Ekstrand 5de9f4409a anv: Add a vk_image_layout_to_usage_flags helper 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4100>
 2020-04-24 16:17:44 +00:00
Rafael Antognolli e3ab86c599 anv: Enable HiZ on multi-layer depth buffers. 
Improves The Witcher 3 fps by 2-10% on ICL (depending on the configs and
system).

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4661>
 2020-04-24 15:14:59 +00:00
Christian Gmeiner 709f26c47d etnaviv: support for using generic blit path 
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1641>
 2020-04-24 13:51:28 +00:00
Christian Gmeiner b043c40edd etnaviv: call util_blitter_save_fragment_constant_buffer_slot(..) 
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/1641>
 2020-04-24 13:51:28 +00:00
Christian Gmeiner e731740388 etnaviv: drop default state for FE_HALTI5_ID_CONFIG 
It gets emitted when needed - see emit_halti5_only_state(..).

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4729>
 2020-04-24 13:39:58 +00:00
Jonathan Marek 73f7f73ef3 freedreno/ir3: fix incorrect conversion folding 
Fixes dEQP-VK.glsl.builtin.function.pack_unpack.unpackhalf2x16_compute

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
 2020-04-24 13:11:58 +00:00
Jonathan Marek dd49a40410 freedreno/ir3: set even bit for f2f16_rtne 
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
 2020-04-24 13:11:58 +00:00
Jonathan Marek edc35c1f54 freedreno/ir3: fix 16-bit ssbo access 
Update cat6 instruction type, and shift 1 in lower_offset_for_ssbo.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4708>
 2020-04-24 13:11:58 +00:00
Rhys Perry ede1c171c5 aco: fix outdated label_vec from p_create_vector labelling 
Fixes random dEQP-VK.transform_feedback.fuzz.* crashes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2dc550202e
    ('aco: copy-propagate p_create_vector copies of vectors')

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4730>
 2020-04-24 12:21:15 +00:00
Jason Ekstrand fdf9b674ee nir/lower_subgroups: Mask off unused bits in ballot ops 
Thanks to VK_EXT_subgroup_size_control, we can end up with
gl_SubgroupSize being as low as 8 on Intel.

Fixes: d10de25309 "anv: Implement VK_EXT_subgroup_size_control"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4694>
 2020-04-24 11:37:03 +00:00
Jason Ekstrand 9c009da208 anv: Drop an assert 
Ever since Vulkan 1.2, this feature has been in core so enabling the
extension is no longer required.

Fixes: 4ef3f7e3d3 "anv: Enable Vulkan 1.2 support"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4694>
 2020-04-24 11:37:03 +00:00
Marek Olšák b520a58cc1 radeonsi: use pipe_blend_state::max_rt to update fewer blend registers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
 2020-04-24 10:38:55 +00:00
Marek Olšák b4fd8f1919 ac,radeonsi: simplify checking for Navi1x chips 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
 2020-04-24 10:38:54 +00:00
Marek Olšák d8443b211e ac: out-of-order rasterization is not supported on gfx10 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4698>
 2020-04-24 10:38:54 +00:00
Jonathan Marek e43fc003e0 turnip: divide cube map depth by 6 
This matches the GL driver and fixes these tests:

dEQP-VK.glsl.texture_functions.query.texturesize.samplercubearray*

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4709>
 2020-04-24 10:24:55 +00:00
Jason Ekstrand bc5c438289 spirv: Fix passing combined image/samplers through function calls 
Fixes dEQP-VK.spirv_assembly.instruction.function_params.sampler_param

cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4684>
 2020-04-24 09:43:21 +00:00
Jason Ekstrand a1a08a5802 nir/opt_deref: Remove certain sampler type casts 
The SPIR-V parser sometimes generates casts from specific sampler types
like sampler2D to the bare sampler type.  This results in a cast which
causes heartburn for drivers but is harmless to remove.

cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4684>
 2020-04-24 09:43:21 +00:00
Jason Ekstrand f4addfdde3 spirv: Use nir_const_value for spec constants 
When we originally wrote spirv_to_nir we didn't have a good scalar value
union to handily use so we rolled our own thing for spec constants.  Now
that we have nir_const_value, we can use that and simplify a bunch of
the spec constant logic.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
 2020-04-24 09:23:59 +00:00
Jason Ekstrand 6211e79ba5 turnip: Properly handle all sizes of specialization constants 
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
 2020-04-24 09:23:59 +00:00
Jason Ekstrand a4885df9f8 radv: Properly handle all sizes of specialization constants 
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
 2020-04-24 09:23:59 +00:00
Jason Ekstrand a44e63398b anv: Properly handle all sizes of specialization constants 
Closes: #2812
cc: mesa-stable@lists.freedesktop.org

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
 2020-04-24 09:23:59 +00:00
Jason Ekstrand 64e4297629 spirv: Allow constants and NULLs in SpvOpConvertUToPtr 
We were accidentally asserting that the value had to be a vtn_ssa_value
which isn't true if it, for instance, comes from a spec constant.

Fixes: fb282a68bc "spirv: Implement OpConvertPtrToU and OpConvertUToPtr"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4675>
 2020-04-24 09:23:59 +00:00
Eduardo Lima Mitev 4dc7b76276 anv/radv: Resolving 'GetInstanceProcAddr' should not require a valid instance 
Since vk_icdGetInstanceProcAddr() is wired through
vkGetInstanceProcAddr() in both drivers, we lost the ability for
'GetInstanceProcAddr' to resolve itself prior to having a valid
instance.

An upcoming spec change will fix that and allow
vkGetInstanceProcAddr() to resolve itself passing NULL as
instance. See https://gitlab.khronos.org/vulkan/vulkan/issues/2057
for details.

This patch implements the change in both radv and anvil.

CTS changes have already landed:
https://gitlab.khronos.org/Tracker/vk-gl-cts/issues/2278

vulkan-loader changes have also landed:
https://gitlab.khronos.org/Tracker/vk-gl-cts/issues/2278

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4273>
 2020-04-24 09:09:14 +00:00
Rhys Perry 665250e830 aco: fix v_or(s_lshl) and v_add(s_lshl) optimizations 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: d1621834f3
    ('aco: combine VALU and SALU into various VOP3 instructions')

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2822
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4717>
 2020-04-24 08:55:19 +00:00