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Kenneth Graunke 6281a12822 brw: Remove brw_inst::no_dd_check/no_dd_clear 
These dependency hints were primarily useful for the vec4 backend, where
it was common to write subsets of a vec4's components across multiple
instructions.  In the scalar backend, we rarely used them.  They also no
longer exist on Tigerlake and later in favor of software scoreboarding.

Dropping this allows us to clean up the IR a bit.

We still use the hardware hints in the generator in a couple places:

   - Gfx9-12.0 scratch headers
   - Quad swizzles
   - Indirect MOV lowering

In theory we might want them back if we moved that lowering to the IR.
For scratch at least, I suspect it won't have a huge impact, as we're
already incurring the cost of spills/fills.  The others are fairly rare
as well, so it may not be worth keeping.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36730>
 2025-09-12 00:24:55 +00:00
Gert Wollny b26c68e40a r600/sfn: Filter lowering of b2f32(comp(x,y)) for 64 bit sources 
Instead of skipping later, we can filter these instructions right away.

Fixes: 51d8ca2dff ("r600/sfn: optimize comparison results")

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37298>
 2025-09-11 23:00:21 +00:00
Sagar Ghuge 99cd6ffd1f isl: Respect driconf option for EnableSamplerRoutetoLSC 
For EnableSamplerRoutetoLSC, we do check driconf option. Buffer state
setup is just missing that option so add check for that too.

Fixes: 7934b70f ("isl/iris/anv: provide drirc toggle intel_sampler_route_to_lsc")
Cc: mesa-stable
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Caleb Callaway <caleb.callaway@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37190>
 2025-09-11 20:31:51 +00:00
Danylo Piliaiev 715b8ba539 egl: Bring back util_cpu_trace_init 
Partially reverts "perfetto: unify init". EGL lib uses perfetto,
but after the change, util_cpu_trace_init doesn't happen inside
libEGL.so, so when it tries to use perfetto, it crashes.
Perfetto initialization happens inside other Mesa's libs, but
each lib that uses perfetto must initialize it.

Fixes: c7045e3e63 ("perfetto: unify init")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37303>
 2025-09-11 19:49:51 +00:00
Mike Blumenkrantz 32b4412d54 zink: update gfx pipeline less frequently 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37308>
 2025-09-11 18:21:40 +00:00
Mike Blumenkrantz b497a81dd1 zink: make find_completed_batch_state() only return state for COPY_ONLY ctx 
COPY_ONLY has no descriptor support, so these states cannot be recycled
like the others

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37306>
 2025-09-11 17:54:22 +00:00
Mike Blumenkrantz 13ea671b68 zink: simplify state iterating in find_completed_batch_state() 
this is a bit easier to read

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37306>
 2025-09-11 17:54:22 +00:00
Mike Blumenkrantz a6918f1bed zink: don't init batch descriptors for copy contexts 
these are never used and waste memory

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37306>
 2025-09-11 17:54:22 +00:00
Eric Engestrom 2fe2ab2bd0 zink+nvk/ci: update test expectations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom d195e64278 zink+turnip/ci: update test expectations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom 11a7693065 turnip/ci: update test expectations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom f21d4d78b0 etnaviv/ci: update test expectations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom 26f04c213d broadcom/ci: update test expectations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom 4db3851b5a zink+lvp/ci: document recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom bea53ef23c broadcom/ci: document recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom 6ecb7f11b7 radv/ci: document recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom ce39a7e2a8 zink+radv/ci: document recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Eric Engestrom bcb66ddd28 zink+radv/ci: sort vangogh flakes 
removes noise out of the next commit

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37302>
 2025-09-11 16:02:38 +00:00
Samuel Pitoiset d46a114206 zink/ci: mark one test as crash/flake for turnip a618 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36174>
 2025-09-11 15:21:50 +00:00
Samuel Pitoiset c122d70dfd radv: set radv_gfx12_hiz_wa=partial for some games to mitigate performance loss 
The full workaround can hurt performance and there is no other known
solution. The only one is to select which HiZ WA works the best by
trial and error.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36174>
 2025-09-11 15:21:50 +00:00
Samuel Pitoiset b00b8c763b radv: disable radv_disable_hiz_his_gfx12 for Mafia Definition Edition 
This should be properly fixed now. Also remove this drirc option which
should no longer be needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36174>
 2025-09-11 15:21:50 +00:00
Samuel Pitoiset ec09ac1501 radv: switch to the full HiZ workaround by default on GFX12 
The full HiZ workaround is the only one that fixes the issue reliably.

Sadly, the performance results are mixed and sometimes it hurts. To
maintain performance, RADV will opt-in by selecting which workarounds
to apply from drirc.

As we can't know the full list of games that will be affected by a
potential performance regression, users are encouraged to try with
RADV_GFX12_HIZ_WA (see Mesa documentation for more explanations).

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36174>
 2025-09-11 15:21:50 +00:00
Samuel Pitoiset 5f8f4686bf radv: replace RADV_GFX12_HIZ_WA by a drirc option 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36174>
 2025-09-11 15:21:50 +00:00
Samuel Pitoiset 0a2ef363a8 radv: report an message when RADV_GFX12_HIZ_WA value is invalid 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36174>
 2025-09-11 15:21:50 +00:00
Erik Faye-Lund fc0418a69f aux/pp: fixup sampler-view release 
Without this, the prost-processing mechanism crashes badly, whoops.

Fixes: 73da0dcddc ("gallium: eliminate frontend refcounting from samplerviews")
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37290>
 2025-09-11 13:44:55 +00:00
Karol Herbst b584b47d01 rusticl/mem: fix Image::read for 1Darray images 
Some drivers do not return identical strides when mapping 1Darray images
leading to data being written in the wrong place.

Cc: mesa-stable
Tested-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37284>
 2025-09-11 09:26:30 +00:00
Samuel Pitoiset ec87f1338f radv: emit more push shader registers on GFX12 
They are supposed to be slightly faster.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37256>
 2025-09-11 06:47:40 +00:00
Samuel Pitoiset 9039f33a8d Revert "radv: handle fbfetch output after binding graphics shaders" 
This is actually wrong because if radv_handle_fbfetch_output() triggers
a decompression pass and graphics shaders (ESO) are saved/restored
they won't be updated because radv_bind_graphics_shaders() was called
before.

This fixes a very recent regression that I noticed while implementing
a new extension.

This reverts commit 9b912f00c7.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37194>
 2025-09-11 06:22:20 +00:00
Samuel Pitoiset b69b953973 radv: add RADV_DEBUG=bo_history 
This dumps the BO history to /tmp/radv_bo_history.log after each BO
operations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37062>
 2025-09-11 06:03:15 +00:00
Rob Clark 0fe652971e freedreno/a6xx: Add missing format 
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37279>
 2025-09-11 03:08:54 +00:00
Rob Clark 6ab682e5f2 freedreno/blitter: Don't ignore blit swizzle 
Noticed by inspection.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37279>
 2025-09-11 03:08:54 +00:00
Rob Clark 250dba1dce freedreno/a6xx: Fallback to original blit in the snorm_copy path 
Unlike z/s blits, where we want the fallback to use the re-written blit,
we don't want this in the handle_snorm_copy_blit() path.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37279>
 2025-09-11 03:08:54 +00:00
Caio Oliveira 03e9c01f0c brw: Add and use more brw_validate.cpp macros 
Add and use more comparison variants (which provide more detailed print
out of the values), remove old references to "fsv" and "scalar", use
assertion names more similar to GoogleTest that we already use
elsewhere.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37267>
 2025-09-10 17:44:38 -07:00
Mel Henning a9ea4630d4 nak: Make BindlessSSA store [SSAValue; 2] 
This reduces the size of ir::Src from 40 bytes down to 32 bytes. This
makes the size of ir::Op fall from 272 bytes down to 232 bytes, meaning
we save 40 bytes per instruction.

Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37130>
 2025-09-10 22:25:13 +00:00
Mel Henning 8ac9b077b1 nak/assign_regs: Make src_ssa_ref return a slice 
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37130>
 2025-09-10 22:25:13 +00:00
Mel Henning d21a4d9e50 nak: impl HasRegFile for SSARef and &[SSAValue] 
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37130>
 2025-09-10 22:25:13 +00:00
Mel Henning 603d7f9413 nak: Remove Option<> from SSARef::file() return 
Nothing actually wants to mix register files in a SSARef so in practice
no callers really handled the None return case. Panic on that case
instead.

Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37130>
 2025-09-10 22:25:12 +00:00
Dylan Baker 08a3497223 anv: add assertion that tes and tcs data is non-null 
It doesn't make any sense ot have TCS but not TES (or vice versa), but
coverity doesn't realize that. Add an assertion that they are both
non-null before we start reading them.

Fixes: 50fd669294 ("anv: prep work for separate tessellation shaders")
CID: 1665360
CID: 1665327
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37266>
 2025-09-10 18:18:42 +00:00
Dylan Baker ecfce9f9ad blorp: Fix potential read of uninitaized elk fields in debug paths 
The intel_vue_map is only partially initialized before being used. All
used fields are initialized, but in debug paths the unitialzed fields
will also be read. To fix this initialize the struct to 0. In the brw
path this struct is part of the prog_data, and is rzalloc'd.

CID: 1665308
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37261>
 2025-09-10 17:51:34 +00:00
Dylan Baker 6fe4b7344d isl: prevent potential overflow before widen 
Fixes: 73608eb8b7 ("isl: Add support for creating layered surfaces for video encode/decode")
CID: 1665354
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37260>
 2025-09-10 17:01:40 +00:00
Dylan Baker f18aca8689 intel/brw: Fix implementaiton of |= operator for enum 
The current implementation does nothing, since it has no side effects,
only a return value. By passing `x` as a reference we can mutate the
value before returning.

Fixes: df37c7ca74 ("brw: fix analysis dirtying with pulled constants")
CID: 1665293
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37263>
 2025-09-10 16:30:19 +00:00
Dylan Baker 70ebc14de9 anv: avoid potential integer overflow in video address calculation 
Coverity caught one instance of this, by visual inspection I found
another case.

Fixes: 3fb25cc78a ("anv: Add support for creating layered surfaces for video encode/decode")
CID: 1665326
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37262>
 2025-09-10 16:06:37 +00:00
Anna Maniscalco 011ba1842e freedreno/registers: add CP_ALWAYS_ON_CONTEXT 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37237>
 2025-09-10 15:10:14 +00:00
Samuel Pitoiset 1da270fb35 radv/amdgpu: add more helpers for managing virtual BOs 
All these new helpers will make the SMEM PRT workaround better
organized.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37193>
 2025-09-10 14:50:25 +00:00
Samuel Pitoiset 3c4168a3cc radv/amdgpu: return OOM device when BO mapping fails 
It's more appropriate than VK_ERROR_UNKNOWN.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37193>
 2025-09-10 14:50:24 +00:00
Valentine Burley fd6d285417 zink/ci: Add a new Minecraft restricted trace 
From @zmike, it exposes a very niche corner case bug in zink.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37270>
 2025-09-10 14:35:23 +00:00
David Rosca 9d9fc1fe72 radeonsi/vcn: Get rid of PIPE_ALIGN_IN_BLOCK_SIZE 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37143>
 2025-09-10 13:27:54 +00:00
David Rosca 8eb84f8854 radeonsi/vcn: Fix calculating QP map region dimensions 
It needs to be aligned to block size otherwise it would skip last
row/column on resolutions like 1080p.

Cc: mesa-stable
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37143>
 2025-09-10 13:27:54 +00:00
Mike Blumenkrantz 5fefb9e795 zink: flag vertex element state for rebind after vstate draws 
vstate draws bind their own elements unrelated to the bound
gallium elements, so any draw occurring after a vstate draw must
rebind to ensure the correct ones are bound

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13570

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37274>
 2025-09-10 13:06:07 +00:00
David Rosca a03a79aa9d pipe: Remove PIPE_VIDEO_CAP_PREFERS/SUPPORTS_INTERLACED 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36632>
 2025-09-10 12:33:57 +00:00