Mike Blumenkrantz
5ce3fa0100
zink: handle bo struct types that are just a runtime array
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634 >
2021-09-07 13:29:57 +00:00
Mike Blumenkrantz
efc4e577ed
zink: handle 8/16bit ssbo storage
...
this is a bit gross, but basically just add an array of extra spvids
so that each bitsize can have its own variables to keep the types in sync
glsl can't do this, but (future) internal mesa shaders can
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634 >
2021-09-07 13:29:57 +00:00
Mike Blumenkrantz
600f7804bf
zink: implement nir_op_pack_half_2x16_split
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634 >
2021-09-07 13:29:57 +00:00
Mike Blumenkrantz
567d539512
zink: lower 32_2x16_split pack/unpack instructions
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634 >
2021-09-07 13:29:57 +00:00
Mike Blumenkrantz
376b963c81
zink: hook up 8/16bit storage exts
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634 >
2021-09-07 13:29:57 +00:00
Mike Blumenkrantz
86b4e2e9cc
zink: add 8bit alu handling
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12634 >
2021-09-07 13:29:57 +00:00
Mike Blumenkrantz
6931fe58ca
zink: fix PIPE_CAP_DRAW_PARAMETERS export
...
before 1.2, assume this is available if the extension is there, otherwise
require the feature
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12710 >
2021-09-07 13:17:45 +00:00
Mike Blumenkrantz
22da219dd8
zink: always emit sample id 0 for non-msaa texel pointers in ntv
...
in practice this shouldn't matter since the sample id must always be zero,
but it's still a spec violation
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12710 >
2021-09-07 13:17:45 +00:00
Mike Blumenkrantz
d524d0d72b
zink: move drawid_broken to unhashed pipeline state
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660 >
2021-09-07 13:03:08 +00:00
Mike Blumenkrantz
58d08635b5
zink: move point sprite rasterizer bits to unhashed pipeline state
...
avoid reading values that aren't part of the pipeline state
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660 >
2021-09-07 13:03:08 +00:00
Mike Blumenkrantz
0dc2de7b76
zink: add pipeline state flag for determining if output type is points
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660 >
2021-09-07 13:03:08 +00:00
Mike Blumenkrantz
ad45e351a2
zink: move sample part of fs key to renderpass
...
this is more accurate
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660 >
2021-09-07 13:03:08 +00:00
Mike Blumenkrantz
43cfd97ade
zink: remove tcs shader keys
...
these never did anything and need a rework to become useful, assuming
I even find a case where such a thing would be needed
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660 >
2021-09-07 13:03:08 +00:00
Mike Blumenkrantz
75ed571921
zink: hash blend state pointers on creation
...
Reviewed-by: Dave Airlie <airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12660 >
2021-09-07 13:03:08 +00:00
Danylo Piliaiev
9ab4bfcb53
turnip: re-emit vertex params after they are invalidated
...
Constants could be invalidated via HLSQ_INVALIDATE_CMD which is
emitted when new pipeline is bound and in CmdClearAttachments.
Also they become invalid after secondary cmd execution.
Fixes geometry flickering in Genshin Impact
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5313
Fixes: 815a85dd7c "turnip: do not re-emit same vs params"
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12684 >
2021-09-07 08:34:18 +00:00
Jonathan Marek
27f2c9dc2e
freedreno/registers: add a6xx media formats
...
Define hardware formats which correspond to media formats.
DPU/CAMSS/VENUS/CDSP can consume/produce buffers in these formats with UBWC
Signed-off-by: Jonathan Marek <jonathan@marek.ca >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12740 >
2021-09-06 18:48:47 +00:00
Emma Anholt
c993f02f6a
i915g: Reject non-unrolled loops or non-flattend IFs at link time.
...
i915 has no support for control flow, so we need to link-fail shaders that
fail to unrooll loops. This is valid for GLES2, and non-conformant but
the best we can do for GL2.
Note that we still have some dEQP failures where loops that should be
unrollable and thus are required to be supported don't get unrolled
(#4979 ).
Closes : #4978
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218 >
2021-09-06 18:09:25 +00:00
Emma Anholt
17332ceb0f
mesa/st: Add an optional GLSL link fail msg to finalize_nir.
...
GLES2 drivers are allowed to reject some GLSL constructs, like dynamic
loop bounds (which neither i915g nor vc4 can fully support), but gallium
hasn't had any way to trigger a link failure. Add a return msg to the
finalize_nir hook, which is called at the end of GLSL linking, and use
that. This means that some other callers of finalize need to do something
with the msg, and we (for now) just throw it away.
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218 >
2021-09-06 18:09:25 +00:00
Emma Anholt
1b4b9a9eff
i915g: Add finalize_nir.
...
This allows mesa/st to do some more optimization of state variables, but
more importantly it will be what we use to do GLSL link-time errors for
loops.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218 >
2021-09-06 18:09:25 +00:00
Emma Anholt
682d08a6ea
i915g: Expose PIPE_CAP_TGSI_TEXCOORD.
...
We want to be able to use finalize_nir, but doing so requires this flag to
be set because not having it is incompatible with being able to finalize
twice (since the texcoord workaround varyings shift happens at variant
time rather than link time).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218 >
2021-09-06 18:09:25 +00:00
Emma Anholt
d5254601c9
i915g: Simplify the process of texcoord mapping to TGSI semantics.
...
Custom index-as-semantic defines and extra bool flags at state update time
are unnecessary if we just store the semantics and index that each
texcoord should be.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218 >
2021-09-06 18:09:25 +00:00
Emma Anholt
6dd87592a6
mesa/st: Add an assertion for finalize_nir versus PIPE_CAP_TEXCOORD.
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218 >
2021-09-06 18:09:25 +00:00
Emma Anholt
9194ee90c8
cso: Revert using FS sampler count for other stages at context unbind.
...
You shouldn't be asking drivers without VS texturing to unbind VS
textures, which was breaking i915g.
Fixes: 802e43a6b5 ("gallium/cso: add unbind mask for cso restore")
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12218 >
2021-09-06 18:09:25 +00:00
Rob Clark
b8b475ad4e
nir/lower_amul: Fix usage of nir_foreach_src()
...
nir_foreach_src() bails after cb returns false for any src. Which isn't
the behavior we were looking for. Move progress flag to state struct
instead, so we don't skip visiting some sources.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12732 >
2021-09-06 15:58:05 +00:00
Rob Clark
5800fde1bb
nir/lower_amul: Handle load/store_global
...
These need more than 24b.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12732 >
2021-09-06 15:58:05 +00:00
Rhys Perry
c1e668d5d1
aco/ra: don't use ds_write_b8_d16_hi/ds_write_b16_d16_hi on GFX8
...
GFX8 doesn't support these opcodes.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Fixes: c75138ed64 ("aco/ra: refactor subdword definition info")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12721 >
2021-09-06 15:10:26 +00:00
Juan A. Suarez Romero
265515fa62
broadcom/compiler: check instruction belongs to current block
...
Check in the ldunif optimization if the current instruction belongs to
current block.
These avoids again searching the instruction when current block is not
correctly set, as it happened in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12339 and in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12221 .
v2:
- Remove extra blank line (Iago)
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com >
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12358 >
2021-09-06 10:38:06 +00:00
Iago Toral Quiroga
3ef2ca9cbf
broadcom/compiler: don't enable early fragment tests if shader writes Z
...
We had an optimization to auto-enable early fragment tests when a shader
didn't have side effects, but of course, we cannot do that this if the
shader writes Z, as in that case the fragment tests need to use the
value written from the shader.
Also, if the shader enables early fragment tests, then any shader Z
writes should be ignored.
Fixes:
dEQP-VK.spirv_assembly.instruction.graphics.early_fragment.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12736 >
2021-09-06 12:01:43 +02:00
Iago Toral Quiroga
38d79d00a1
v3dv: honor VkPhysicalDeviceFeatures2 in pNext chain of VkDeviceCreateInfo
...
Fixes:
dEQP-VK.robustness.buffer_access.through_pointers.*.reads.*
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12718 >
2021-09-06 08:11:42 +02:00
Vinson Lee
9b6c641cb5
nv50/ir: Add DeadCodeElim constructor.
...
Fix defect reported by Coverity Scan.
Uninitialized scalar field (UNINIT_CTOR)
member_not_init_in_gen_ctor: The compiler-generated constructor
for this class does not initialize deadCount.
Signed-off-by: Vinson Lee <vlee@freedesktop.org >
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12697 >
2021-09-05 21:40:09 -07:00
Ilia Mirkin
5d91cf41f1
freedreno: use OUT_WFI for emit_marker
...
This is only used pre-a5xx, where we want OUT_WFI. Tested on FD420.
Fixes: 8651cfbbf0 (freedreno: emit_marker() cleanup)
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12734 >
2021-09-05 23:55:31 +00:00
Rob Clark
6619877bdf
clover: Don't remove sampler/image uniforms
...
Otherwise we fool nir_shader_gather_info() into telling us there are no
samplers/images.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Reviewed-by: Karol Herbst <kherbst@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12733 >
2021-09-05 18:14:08 +00:00
Jesse Natalie
43c4f5eb63
ci/windows: Build spirv-to-dxil
...
Reviewed-by: Enrico Galli <enrico.galli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12728 >
2021-09-04 19:47:54 -07:00
Jesse Natalie
015cc73407
spirv2dxil: Fix build after spirv_to_dxil signature change
...
Fixes: ada05759 ("spirv_to_dxil: Convert out parameters to a single object")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5322
Reviewed-by: Enrico Galli <enrico.galli@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12728 >
2021-09-04 19:47:41 -07:00
Bas Nieuwenhuizen
8de60a1654
util/fossilize_db: Don't corrupt keys during entry read.
...
We change the hash that is still used to set entry->key.
Fixes: d2d642cc01 "util/fossilize_db: Only allocate entries after full read."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12725 >
2021-09-04 15:12:06 +02:00
Emma Anholt
5610b5840d
osmesa: Add a unit test for resizing buffers.
...
This should cover both the former use-after-free of the old pixel buffer
when moving the context to a new pixel buffer, and also successful moving
to a different-sized pixel buffer.
Reviewed-by: Adam Jackson <ajax@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12685 >
2021-09-03 20:30:04 +00:00
mattvchandler
eed660221b
gallium/osmesa: fix buffer resizing
...
Generate a new buffer if OSMesaMakeCurrent is called with a new size
Fix a use-after-free error when the old buffer is destroyed
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5276
Fixes: 26c6f6cfbb ("gallium/osmesa: Remove the broken buffer-reuse scheme.")
Reviewed-by: Emma Anholt <emma@anholt.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12685 >
2021-09-03 20:30:04 +00:00
Mike Blumenkrantz
3b289c9f30
tgsi_to_nir: force int type for LAYER output
...
this otherwise gets confused as a vec4 most of the time
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12709 >
2021-09-03 19:48:38 +00:00
Emma Anholt
1cc8523c5c
freedreno/ir3: Use LDIB for coherent image loads on a5xx.
...
If the coherent flag is present, then we need to not have an incoherent
cache between us and previous stores to the image that were also decorated
as coherent. isam apparently (unsurprisingly) goes through a texture
cache. Use ldib instead, so that we don't get the wrong result.
We would need a similar fix for a4xx, but that uses ldgb and I don't
have hardware to test on.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704 >
2021-09-03 18:17:07 +00:00
Emma Anholt
2b6729883a
freedreno/ir3: Add encode/decode support for a5xx's LDIB.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704 >
2021-09-03 18:17:07 +00:00
Emma Anholt
127e845d1d
freedreno/ir3: Refactor a3xx ibo/ssbo load/store instruction XML.
...
There are fields common to both loads and stores, but not resinfo. Move
them to a common bitset to reduce duplication.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704 >
2021-09-03 18:17:07 +00:00
Emma Anholt
9cf232c9a8
freedreno/ir3: Clarify what's going on in a4xx SSBO atomics.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704 >
2021-09-03 18:17:07 +00:00
Emma Anholt
23f7e06cd8
freedreno/ir3: Don't use isam for coherent image loads on a6xx.
...
If the coherent flag is present, then we need to not have an incoherent
cache between us and previous stores to the image that were also decorated
as coherent. isam apparently (unsurprisingly) goes through a texture
cache. Use ldib instead, so that we don't get the wrong result.
We need a similar fix for pre-a6xx, but we don't have
emit_intrinsic_load_image for those (yet).
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704 >
2021-09-03 18:17:07 +00:00
Emma Anholt
24fbda3f36
ci/freedreno: Fix xfail update for arb_draw_indirect.
...
I saw UnexpectedPass in my patch, and removed the Crash, but it was
actually Crash -> Fail that had happened.
Fixes: 83e9a7fbcf ("freedreno/ir3: Align driver param upload size/offset for indirect uploads.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12704 >
2021-09-03 18:17:07 +00:00
Emma Anholt
4717c0ca90
ci/v3dv: generalize the buffer_access.through_pointers flakes.
...
I saw an unrelated marge pipeline fail on
dEQP-VK.robustness.buffer_access.through_pointers.graphics.reads.fragment.4B_out_of_memory_with_vec4_f32,
and it sure looks like all of these are flaky.
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12681 >
2021-09-03 18:02:34 +00:00
Enrico Galli
398d591b65
spirv_to_dxil: Add support for non-zero vertex and instance indices
...
Since DXIL does not have a way to get the base/first vertex and base
instance as well as using a zero-based vertex index, these values need
to be passed in via a constant buffer.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707 >
2021-09-03 16:21:03 +00:00
Enrico Galli
49ef896a5e
spirv_to_dxil: Add support for nir_intrinsic_load_num_workgroups
...
Since DXIL does not have a way to get the number of workgroups used
during dispatch with a system-value, these numbers need to be passed in
via a constant buffer.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707 >
2021-09-03 16:21:03 +00:00
Enrico Galli
9461fe5cf1
nir: Add CAN_REORDER to load_ubo_dxil
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707 >
2021-09-03 16:21:03 +00:00
Enrico Galli
ada05759e1
spirv_to_dxil: Convert out parameters to a single object
...
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12707 >
2021-09-03 16:21:03 +00:00
Timur Kristóf
268158a758
aco/optimize_postRA: Use iterators instead of operator[] of std::array.
...
Also add a few more assertions to make sure the registers are
within the bounds of the array.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de >
Reviewed-by: Joshua Ashton <joshua@froggi.es >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682 >
2021-09-03 15:00:55 +00:00