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Author SHA1 Message Date
Timur Kristóf 5c95b32c6e aco: Implement the new tessellation I/O related NIR intrinsics. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf e10e74a7af aco: Implement new buffer load/store intrinsics. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf 4c5c610f1d nir: Add AMD-specific Geometry Shader related intrinsics. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf 38df949f98 nir: Add tessellation related AMD-specific intrinsics. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf 744dc74078 nir: Add nir_opt_offsets to fold const adds into load/store offsets. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf eee3435757 nir: Add AMD-specific buffer load/store intrinsics. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf c2a81ebe19 nir: Add default unsigned upper bound configuration. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf 8ebb8d31af nir: Add unsigned upper bound for TCS load_invocation_id. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf 9fbfafb57a nir: Shrink vectors for load_shared. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf 084863bb5d nir: Fix unsigned upper bound of local_invocation_index for non-CS stages. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf 132171dc4e nir: Add a few more algebraic optimizations to help address calculation. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf 9f9b0f583b nir: Add nir_builder helper for I/O address offset calculations. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Timur Kristóf f6f68d5cf1 nir: Add new nir_builder helpers for iadd with no_unsigned_wrap. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Rhys Perry 5bc42ce579 nir: Don't update base in vectorize_loads() 
The offset is already updated with consideration to the base above under
"/* update the offset */".

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9201>
 2021-03-17 12:42:23 +00:00
Rhys Perry c580c3f9c7 aco/tests: add test for waNsaCannotFollowWritelane 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9187>
 2021-03-17 12:31:05 +00:00
Rhys Perry 502a073552 aco: fix NSA following writelane 
No fossil-db changes on GFX10.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: c353895c92 ("aco: use non-sequential addressing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9187>
 2021-03-17 12:31:05 +00:00
Rhys Perry 298d400e5c aco/tests: add test for NSAToVMEMBug 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9187>
 2021-03-17 12:31:05 +00:00
Rhys Perry 194f3e4c69 aco: fix NSA MIMG followed by MUBUF/MTBUF 
No fossil-db changes on GFX10.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: c353895c92 ("aco: use non-sequential addressing")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9187>
 2021-03-17 12:31:05 +00:00
Danylo Piliaiev b804abd61d freedreno/isa: assert if field's range is out of bitset's range 
Also, update outdated comment along the way.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9628>
 2021-03-17 12:07:54 +00:00
Danylo Piliaiev 42c81e1901 ir3: match mova1 mnemonic when writing to A1 
For MOV to A1 blob uses "mova1" mnemonic, which is mov.u16u16;
change s16 to u16 when creating MOV to A1 in order to match the blob.

Before, couldn't be parsed back:
 mov.s16s16 ha0.y, 0

After, could be parsed back and matches blob behaviour:
 mova1 a1.x, 0

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9628>
 2021-03-17 12:07:54 +00:00
Danylo Piliaiev c0a62b203e ir3/isa,parser: fix encoding and parsing of bindless s2en SAM 
Before, decoding showed that there is an error:
 sam.base0 (f32)(xyzw)r0.x, r0.z, a1.x   ; no field 'HAS_SAMP',
  WARNING: unexpected bits[0:7] in #cat5-samp-s2en-bindless-a1: 0x1 vs 0x0

After:
 sam.base0 (f32)(xyzw)r0.x, r0.z, s#1, a1.x

Fixes textures on the ground in TauCeti Vulkan Technology Benchmark

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9628>
 2021-03-17 12:07:54 +00:00
Juan A. Suarez Romero 727eadc76a ci/vc4/v3d: run piglit testsuite against Xorg 
This increases the coverage adding tests that require an X server to
run.

Update also the expected results, and skip some flake tests.

Reviewed-by: Andres Gomez <agomez@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9562>
 2021-03-17 11:40:58 +00:00
Juan A. Suarez Romero dc2e3d6ff2 ci/v3dv: add flaky test in the skip list 
Reviewed-by: Andres Gomez <agomez@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9562>
 2021-03-17 11:40:58 +00:00
Juan A. Suarez Romero c19bc782cc ci/armXX: add libgl1-mesa-dev dependency 
Waffle building requires libgl1-mesa-dev to add support for GLX. This
package is pulled automatically in arm64 container as a suggested
package, but no in armhf. Which means we end up having support for GLX
in waffle in arm64 but not in armhf.

Thus let's install explicitly this package to have support in both
cases.

Reviewed-by: Andres Gomez <agomez@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9562>
 2021-03-17 11:40:58 +00:00
Juan A. Suarez Romero 557c86d6ce vc4: destroy renderonly object if present 
When destroying the VC4 screen, check if renderonly exists before
freeing it.

This fixes for instance a segmentation fault caused when invoking
wflinfo.

Fixes: 187218395d ("renderonly: remove layering violations")
Reviewed-by: Andres Gomez <agomez@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9562>
 2021-03-17 11:40:58 +00:00
Alejandro Piñeiro ec4c79c2b0 v3dv: avoid some maybe-uninitialized warnings 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9640>
 2021-03-17 10:05:07 +00:00
Alejandro Piñeiro c373b24369 v3dv/descriptor_set: don't free individual set if not allowed 
If we have a host_memory_base pointer it means that we are handling
the pool memory as a whole, so each set is a sub-slice of the memory
pool. In this case we can't just free the individual set. In other
words, VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT is not set.

Note tha at that point we were able to sub-allocate an set, and we are
failing to sub-allocate the pool bo for the descripto bo. So
technically we could try to return that set to the pool (so undo the
change on host_memory_ptr before), that I assume was my intention when
(wrongly) calling vk_free there. But in practice, at that point we are
already on a out of descriptor pool situation, so in the end it
doesn't even matter.

This fixes a double free crash with the UE4 VehicleGame demo.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9640>
 2021-03-17 10:05:07 +00:00
Iago Toral Quiroga aefac60741 broadcom/compiler: use nir_lower_wrmasks to simplify TMU general stores 
This pass splits writemaks with non-consecutive bits into multiple
store operations ensuring that each store only has consecutive
writemask bits set.

We can use this to simplify writemask handling in our backend removing
a loop solely intended to handle this case.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9619>
 2021-03-17 09:35:19 +00:00
Iago Toral Quiroga 51a263530f broadcom/compiler: use nir_opt_load_store_vectorize 
This will make it so we pack consecutive scalar operations into a vector
operation, reducing the amount of load/store operations in the NIR program.
Our backend can handle vector load/stores, and doing so may be more efficient
since we don't need to setup individual load/stores all the time.

A pathological case is:
dEQP-VK.spirv_assembly.instruction.compute.opcopymemory.array
which goes from 862 instructions to only 573 by converting
all scalar SSBO load/store operations to vec4 operations.

total instructions in shared programs: 13752607 -> 13733627 (-0.14%)
instructions in affected programs: 367117 -> 348137 (-5.17%)
helped: 1168
HURT: 371
Instructions are helped.

total threads in shared programs: 412230 -> 412272 (0.01%)
threads in affected programs: 54 -> 96 (77.78%)
helped: 23
HURT: 2
Threads are helped.

total uniforms in shared programs: 3790248 -> 3784601 (-0.15%)
uniforms in affected programs: 57417 -> 51770 (-9.84%)
helped: 1420
HURT: 19
Uniforms are helped.

total max-temps in shared programs: 2322170 -> 2322714 (0.02%)
max-temps in affected programs: 14353 -> 14897 (3.79%)
helped: 185
HURT: 306
Max-temps are HURT.

total spills in shared programs: 5940 -> 6010 (1.18%)
spills in affected programs: 65 -> 135 (107.69%)
helped: 0
HURT: 11

total fills in shared programs: 13372 -> 13494 (0.91%)
fills in affected programs: 75 -> 197 (162.67%)
helped: 0
HURT: 11

total sfu-stalls in shared programs: 31505 -> 31521 (0.05%)
sfu-stalls in affected programs: 751 -> 767 (2.13%)
helped: 210
HURT: 246
Inconclusive result (value mean confidence interval includes 0).

total inst-and-stalls in shared programs: 13784112 -> 13765148 (-0.14%)
inst-and-stalls in affected programs: 360283 -> 341319 (-5.26%)
helped: 1125
HURT: 366
Inst-and-stalls are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9619>
 2021-03-17 09:35:19 +00:00
Iago Toral Quiroga 3db322f305 broadcom/compiler: fix end of tmu sequence detection 
TMUWT always terminates a TMU sequence.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9619>
 2021-03-17 09:35:19 +00:00
Samuel Pitoiset 7bdd569d7e radv: extend the dirty bits to 64-bit 
For future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9603>
 2021-03-17 09:21:38 +00:00
Samuel Iglesias Gonsálvez 0acd7df67b turnip: set depth plane control zmode to A6XX_LATE_Z when sample mask is written 
Otherwise, gl_SampleMask[] writes are ignored and the stencil test works like
if all samples were enabled.

Fixes: dEQP-VK.renderpass.suballocation.multisample.*s8*

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9478>
 2021-03-17 09:05:33 +00:00
Samuel Pitoiset 9d42e71505 radv: add notccompatcmask debug option 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
 2021-03-17 08:55:16 +00:00
Samuel Pitoiset f810d8cd50 radv: enable TC-compat CMASK on GFX10+ 
Untested on older chips. Should help MSAA games by 1-2%.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
 2021-03-17 08:55:16 +00:00
Samuel Pitoiset 72b58c4a5e radv: initialize TC-compat CMASK images with the DCC clear code 
0xff is for fast-clears without MSAA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
 2021-03-17 08:55:16 +00:00
Samuel Pitoiset a3835964ce radv: only configure the CMASK tiling for TC-compat on GFX8 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
 2021-03-17 08:55:15 +00:00
Samuel Pitoiset b9222cc906 radv: make sure FMASK is enabled for TC-compat CMASK 
Otherwise it makes no sense at all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
 2021-03-17 08:55:15 +00:00
Samuel Pitoiset 0c281283d8 radv: remove redundant check when enabling TC-compat CMASK 
We already check that the image has CMASK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
 2021-03-17 08:55:15 +00:00
Samuel Pitoiset d173ed2e9c radv: do not enable TC-compat CMASK if the image isn't readable by a shader 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9415>
 2021-03-17 08:55:15 +00:00
Samuel Pitoiset fb648634b0 radv: use common entrypoints for VK_KHR_copy_commands2 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9600>
 2021-03-17 07:43:36 +00:00
Iago Toral Quiroga f29de817eb compiler/glsl: call util_cpu_detect from glsl_type_singleton_init_or_ref 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Closes: #4393
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9457>
 2021-03-17 08:15:36 +01:00
Iago Toral Quiroga 1e4abf1fe3 vulkan/util: call glsl_type_singleton_init_or_ref from vk_instance_init 
v2: link libvulkan_util with libglsl so it can find the glsl singleton symbols.
v3: link with libcompiler instead of libglsl (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> for the v3dv bits.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> for the turnip bits.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> for the radv bits.
Acked-by: Dave Airlie <airlied@redhat.com> for the lvp bits.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9457>
 2021-03-17 08:15:36 +01:00
Lukas Feller 164a51c80f v3dv: fix stride in buffer copy 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9402>
 2021-03-17 06:42:34 +00:00
Lukas Feller 99a11f25b2 v3dv: fix assertion in job_compute_frame_tiling 
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9402>
 2021-03-17 06:42:34 +00:00
Timur Kristóf d70e017c17 anv: Use ASSERTED for results that are only used in asserts. 
This gets rid of unused variable warnings for these results.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9634>
 2021-03-17 03:47:23 +00:00
Timur Kristóf d7a94cae18 anv: Use unreachable() in anv_genX. 
This gets rid of unused variable warnings on genX_thing, because
now the compiler will think that the unknown hardware generation
case is unreachable.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9634>
 2021-03-17 03:47:23 +00:00
Timur Kristóf 17bc587f88 intel/compiler: Make room for maximum dest size in nir_emit_texture. 
The maximum dest_size is 5, not 4.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9634>
 2021-03-17 03:47:23 +00:00
Timur Kristóf eb378e4cd0 intel/compiler: Use assume() instead of assert() for array bounds. 
This should make both GCC and clang happy and make them believe that
the array bounds are not exceeded.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9634>
 2021-03-17 03:47:23 +00:00
Daniel Stone 84f91dfea5 CI: Change LAVA job visibility 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9635>
 2021-03-17 01:50:37 +00:00
Mike Blumenkrantz 62d6ec083b zink: enable PIPE_CAP_INVALIDATE_BUFFER 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9546>
 2021-03-17 01:40:55 +00:00