Commit Graph

166444 Commits

Author SHA1 Message Date
Alyssa Rosenzweig 59499d8dbc asahi: Fix agx_pack unrolling
The loop is supposed to execute exactly once, but the previous logic
inadvertently executes 0 or 1 times depending on whether dst is NULL (it never
is). Reexpress the loop to execute exactly once, eliminating the unnecessary
branch in this hot path. Noticed when reading the NIR of generated pack code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig 7193849f30 agx: Fuse ubitfield_extract
Similarly, let's get the win everywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig 5500e02a61 agx: Fuse (unmasked) extr_agx
This will clean up genxml unpack code and is needed for parity with the assembly
we write by hand. This way we get the win for all shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig 0cde7b794c agx: Vectorize load/stores
This helps CL shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig 7f27f2e314 agx: Fix lower regular texture metadata
for buffer textures, we insert new blocks which invalidates dominance and
block index info... leads to end-to-end fails when shuffling pass order.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig a6afa48e86 clc: Add missing idep_vtn
From the libclc linking code. This should probably be split out but that seems
like potentially a task for another day. Avoids a linker error in the next
commit the easy way.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig f164edfe71 vtn: Add spirv_library_to_nir_builder feature
This new entrypoint takes in a SPIR-V blob and generates a header containing
a static inline nir_builder-family function for each function in the SPIR-V
library. The generated function will look for the function in the shader and, if
not found, insert a new nir_function with the appropriate signature -- to be
linked with the library later. Then, it will call the function, with the
appropriate gymnastics to handle return values as necessary.

This makes it super convenient to wrap CL libraries for use in a NIR pass.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig b192f3c458 nir/builder: Add nir_call helper
This adds an idiomatic way to insert NIR function calls with the builder. Since
functions have variable numbers of arguments, this is a variadic function.

v2: Define with a variadic macro instead, for safety with the argument count.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig 23bea25207 nir: Add nir_remove_non_exported
For libraries.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alyssa Rosenzweig 6014f745d5 nir,vtn: Add exported bool to nir_function
For optimizing libraries.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25498>
2023-11-02 11:37:46 +00:00
Alejandro Piñeiro 87a673cac4 broadcom/cle: rename xml files
This has been confusing for some time, as from a xml file with the
suffix v33 (so suggesting just one version) we were generating the
headers for v33, v40, v41 and v71.

So now there is a header for the vc4 driver, and one header for the
v3d/v3dv (so v3d "platform") drivers.

FWIW, this means that now the name of the original xml and the header
files generated doesn't maintain a so similar pattern, but again the
equivalence were not there anyway.

Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25851>
2023-11-02 11:59:08 +01:00
Alejandro Piñeiro 9c4829473a broadcom/cle: remove v33 and v41 from xml definition
For the case of v41 is mostly update to v42.

Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25851>
2023-11-02 11:59:08 +01:00
Alejandro Piñeiro e9fa6c0bc6 broadcom/compiler: set properly lod query
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25851>
2023-11-02 11:59:08 +01:00
Alejandro Piñeiro 85f26828fe broadcom: only support v42 and v71
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25851>
2023-11-02 11:59:08 +01:00
Mark Janes a1e6879021 anv: make shader cache content deterministic
Pointer values in shader cache data generate binary differences for
functionally identical shader content.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25923>
2023-11-02 02:53:41 +00:00
Mark Janes f0f0bce314 iris: make shader cache content deterministic
Pointer values in shader cache data generate binary differences for
functionally identical shader content.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25923>
2023-11-02 02:53:41 +00:00
Felix DeGrood aa23120e4f anv: remove CS_FLUSH from query regression
Fixes performance regression introduced by prior refactoring of
pipe control code that unnecessarily added CS_FLUSH to query start
and end. Issue was diagnosed by Ben L (thank you!)

Confirmed this restores performance on:
* Borderlands3 +2%
* Payday +3%
* Factorio +3%
* HogwartsLegacy +4%
* Ghostrunner +7%

Fixes: 6dc95685 (convert genX_query pipe controls to use pc helper)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25983>
2023-11-02 02:28:02 +00:00
David Heidelberg ab6ef87720 ci/zink: restore full premerge testing on Adreno 618
Partial revert of: 68e8e40163 ("ci/zink: reduce premerge testing on a618 to ~ 12 minutes")

Weston is kept, and reduction to the 2 devices, because we have only 9
at maximum capacity available (with 3 parallel jobs we would need at least 10).

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25982>
2023-11-02 00:32:49 +00:00
Faith Ekstrand 6388896985 nir: add deref follower builder for casts.
This fixes intel_clc builds with llvm 17 on gfx125_bvh_build_DFS_DFS
where it dies in the lower indirect derefs pass.

Co-authored-by: Dave Airlie <airlied@redhat.com>
Fixes: 4a4e175738 ("nir: Support deref instructions in lower_var_copies")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25536>
2023-11-01 22:35:23 +00:00
Jesse Natalie 8f9888fd75 dzn: Implement VK_MSFT_layered_driver
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25993>
2023-11-01 22:17:16 +00:00
Max R 75f7910850 virgl: Implement clear_render_target and clear_depth_stencil
This functions are required by d3d10umd frontend.
To implement both clear_render_target and clear_depth_stencil
common virgl command VIRGL_CCMD_CLEAR_SURFACE is introduced.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25947>
2023-11-01 20:33:01 +00:00
Chia-I Wu 796cba9bda radv: fix vkCmdCopyImage2 for emulated etc2/astc
When the image copy is between size-compatible formats with different
block sizes, we need to fix up the extent.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25984>
2023-11-01 20:02:14 +00:00
Rhys Perry b18f0dec41 aco: collect Pre-Sched SGPRs/VGPRs before spilling
The usage after spilling is usually either the same as before or the
maximum.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25559>
2023-11-01 19:41:30 +00:00
Rhys Perry d200916ca2 aco: add VALU/SALU/VMEM/SMEM statistics
This lets us measure optimizations without interference of waitcnt
instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25559>
2023-11-01 19:41:30 +00:00
Jesse Natalie 0756324ca4 d3d12: Only set draw params root parameter index for actual draw params
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25980>
2023-11-01 17:25:25 +00:00
Gert Wollny 3ab51c7ebd r600: Add callbacks for get_driver_uuid and get_device_uuid
v2: Evaluate driver ID dynamically (Adam Jackson)
v3: Align the stars (Triang3l)
v4: include "r600" in driver ID for UUID evaluation (Triang3l)
v5: remove unused local variable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10040
CC: mesa-stable

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25895>
2023-11-01 16:36:42 +00:00
Rhys Perry 7de34ad3ef radv: use NIR_LOOP_PASS helpers
A somewhat random collection of fossils:
    N           Min           Max        Median           Avg        Stddev
x   6         16.59         16.61        16.605     16.603333  0.0081649658
+   6         15.99            16            16     15.998333  0.0040824829
Difference at 95.0% confidence
	-0.605 +/- 0.00830327
	-3.64385% +/- 0.0485573%
	(Student's t, pooled s = 0.00645497)

I'm not sure if nir_opt_if and nir_opt_loop_unroll are actually idempotent
or not.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24197>
2023-11-01 14:16:37 +00:00
Rhys Perry debddca134 nir: add helpers to skip idempotent passes
For example, in the loop:
while (more_late_algebraic) {
   more_late_algebraic = false;
   NIR_PASS(more_late_algebraic, nir, nir_opt_algebraic_late);
   NIR_PASS(_, nir, nir_opt_constant_folding);
   NIR_PASS(_, nir, nir_copy_prop);
   NIR_PASS(_, nir, nir_opt_dce);
   NIR_PASS(_, nir, nir_opt_cse);
}
if nir_opt_algebraic_late makes no progress, later passes might be
skippable depending on which ones made progress in the previous iteration.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24197>
2023-11-01 14:16:37 +00:00
Tapani Pälli faed5d647f iris: handle tile case where cso width, height is zero
Patch adds a fallback to calculate_tile_dimensions if such case is hit,
this happened when running CTS tests on simulation.

Fixes: d13c81a2c3 ("iris/xehp: Implement TBIMR tile pass setup and pipeline bandwidth estimation.")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25989>
2023-11-01 13:48:59 +00:00
Timur Kristóf a19e46f5d0 radv: Implement workaround for unaligned buffer/image copies.
When the pitch or slice pitch isn't properly aligned,
the SDMA HW is unable to copy between tiled images and buffers.

To work around this, we process the image chunk by chunk,
copying the data to a temporary buffer which uses supported
pitches, and then copy it to the intended destination.

The implementation assumes that at least one pixel row of the
image will fit into the temporary buffer, and will try to copy
as many rows at once as possible. Sadly, this still results in
a lot of packets being generated for large images.

A possibe future improvement is to copy the image slice by slice
when only the slice pitch is misaligned. However, that is out
of scope for this commit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25831>
2023-11-01 13:21:01 +00:00
Timur Kristóf ec0605ff72 radv: Add temporary BO for transfer queues.
Some copy operations are poorly supported by the SDMA hardware,
meaning that the built-in packets don't support them, so we will
need to work around that by copying to and from a temporary BO.

The size of the temporary buffer was chosen so that it can fit
at least one full pixel row of the largest possible image.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25831>
2023-11-01 13:21:01 +00:00
Timur Kristóf 8156c923ee radv: Implement buffer/image copies on transfer queues.
Previously, RADV only had a simple implementation of
image to buffer copies using the SDMA for the PRIME copy.

This commit replaces that with a full-featured implementation
that includes buffer to image and image to buffer copies and
removes the assumptions that the PRIME copy had, as well as
adds new helper functions which will be shared with other copy
functions in upcoming commits.

Unaligned buffer/image copies require a workaround, which
will be implemented by a future commit.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25831>
2023-11-01 13:21:01 +00:00
Timur Kristóf ed21f1c962 radv: Expose radv_get_dcc_max_uncompressed_block_size function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25831>
2023-11-01 13:21:01 +00:00
Timur Kristóf 848f2f2b99 radv: Remove always false tmz variables from SDMA functions.
We can re-add them later as-needed.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25831>
2023-11-01 13:21:00 +00:00
Samuel Pitoiset 17daa08dff radv: emit COMPUTE_PIPELINESTAT_ENABLE for CS invocations on ACE
This register seems needed to enable compute shader shader invocations
on GFX7. On GFX8+ it's working fine without emitting this register but
I think it doesn't hurt.

This fixes dEQP-VK.query_pool.statistics_query.*_cq on GFX7.

Fixes: a9945216ba ("radv: fix COMPUTE_SHADER_INVOCATIONS query on compute queue")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25957>
2023-11-01 12:46:17 +00:00
Samuel Pitoiset 9a0a77cb53 radv: fix compute shader invocations query on compute queue on GFX6
Looks like GFX6 always writes the number of compute shader invocations
at offset 0 when used on compute queue.

This fixes dEQP-VK.query_pool.statistics_query.*_cq on GFX6.

Fixes: a9945216ba ("radv: fix COMPUTE_SHADER_INVOCATIONS query on compute queue")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25957>
2023-11-01 12:46:17 +00:00
Samuel Pitoiset 46dc02354a radv: adjust binning settings to improve performance on GFX9
This partially reverts 74ab940156 which
was a fix for random GPU hangs with binning on GFX10+. Though,
according to RadeonSI, only GFX10+ is affected and this reduced perf
on GFX9 chips.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25951>
2023-11-01 12:24:45 +00:00
Samuel Pitoiset e4a1bc70dd radv: bind the non-dynamic graphics state from the pipeline unconditionally
The following sequence is valid (although weird) but many other drivers
(including RADV) were broken:
    - bind pipeline with some static state
    - set state command for that static state (to a bad value)
    - bind the same pipeline again
    - draw

Fixes new dEQP-VK.dynamic_state.*.double_static_bind.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25954>
2023-11-01 09:44:13 +00:00
Sarah Walker 4e912c972b pvr: Update AM62 DSS compatible string to match upstream
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25978>
2023-11-01 09:23:25 +00:00
Samuel Pitoiset 024dab650e radv/ci: enable RADV_DEBUG=nomeshshader for vkcts-navi31-valve
To make VKCTS on NAVI31 stable until the task shader issue is
resolved.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25969>
2023-11-01 08:50:06 +01:00
Samuel Pitoiset a97160cad8 radv: add RADV_DEBUG=nomeshshader
This option will be used to disable VK_EXT_mesh_shader in Mesa CI
for GFX11 because running task shader tests in parallel can hang the
GPU.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10051
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25969>
2023-11-01 08:49:35 +01:00
Samuel Pitoiset 15f92c3b2c radv/ci: update list of expected failures/flakes for NAVI31
Let's clean the flakes list, it might be needed to re-add some of them
but we will track those.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25969>
2023-11-01 08:49:35 +01:00
Bas Nieuwenhuizen da7e6f303b radv: Add some initial graphics DGC preprocessing support.
Just the bits that obviously need no adjustment in the DGC
preprocessing code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25835>
2023-11-01 00:06:10 +00:00
Bas Nieuwenhuizen c4fb827441 radv: Add compute DGC preprocessing support.
This should reduce the overhead due to reduced syncs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25835>
2023-11-01 00:06:10 +00:00
Bas Nieuwenhuizen 108227a84e radv: Add DGC preprocessing barrier support.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25835>
2023-11-01 00:06:09 +00:00
Karol Herbst f7830240ac rusticl/mesa/screen: do not derefence the entire pipe_screen struct
Apparently the dereferences made tsan report data races on the pipe_screen
object.

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25944>
2023-10-31 22:09:56 +00:00
Casey Bowman 71064879d1 anv: Override vendorID for Diablo IV
Another case of a game assuming XeSS is available since an
Intel ARC GPU is discovered by the game's executable binary.

With this, a warning will appear that GPU is unstable/not supported,
but a warning is preferable over the game crashing.

No other issues observed upon starting & playing the game.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25965>
2023-10-31 21:32:48 +00:00
Vitaliy Triang3l Kuzmin 03705f37bf r600: Replace TGSI I/O semantics with shader_enums
Removes the link-time dependency on tgsi_get_gl_varying_semantic from
Gallium auxiliary.

ps_prim_id_input linkage removed due to redundancy - the SPI SID is
calculated for VARYING_SLOT_PRIMITIVE_ID on both sides.

Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25695>
2023-10-31 21:15:27 +00:00
Vitaliy Triang3l Kuzmin 29c544abc0 r600: Fix outputs typo in print_pipe_info
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25695>
2023-10-31 21:15:27 +00:00
Vitaliy Triang3l Kuzmin 5419f52967 r600/sfn: Split r600_shader_from_nir into common and Gallium parts
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25695>
2023-10-31 21:15:27 +00:00