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Daniel Stone 560d43b75e ci/skqp: Don't hardcode LLVM version 
Use our ${LLVM_VERSION} instead.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 5aceba599b ci/skqp: Reorder some things 
Declare all our variables first, so we can use them fearlessly.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 1dd728a3d8 ci/skqp: Make build-skqp safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 0fc65e437a ci/deqp-runner: Make build-deqp-runner safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone fef3170cae ci/angle: Make build-angle safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 7b56710e77 ci/vkd3d: Make Proton build safe for set -u 
The version hadn't been used in years now, so was always just an empty
string.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 6f0457dddb ci/vulkan: Make build-vulkan-validation safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 51dc1ff706 ci/libclc: Make build-libclc safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone ed9c67997a ci/wine: Make build-wine safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 2382b3ea8d ci/windows: Make build-directx-headers safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone d14b27b7fe ci/libdrm: Make build-libdrm safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone c3171bfd6a ci/wayland: Make build-wayland safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 7824cc1265 ci/crosvm: Make build-crosvm safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 4c52663e4a ci/va: Make build-va-tools safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone 41774fde2f ci/apitrace: Make build-apitrace safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone ef05facc5e ci/deqp: Make build-deqp safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone a7824caa8b ci/piglit: Make build-piglit safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:56 +00:00
Daniel Stone 4ae2d97c36 ci: Make setup-test-env safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:56 +00:00
Tapani Pälli e4fcbe8d6f anv: set StackIDControlOverride_RTGlobals for 2 workarounds 
GFX_VER block matches both workarounds and while these workarounds are
almost about the same cause, other one applies only for LNL and other
one for BMG, need to check for both.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31571>
 2024-10-10 10:20:56 +00:00
Tapani Pälli b8fc0288af intel/dev: update mesa_defs.json from workaround database 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31571>
 2024-10-10 10:20:56 +00:00
Erik Faye-Lund aa517f7eb3 mesa: clean up setup of MaxAddressRegs constant 
This value is only ever read for vertex or fragment shaders, so let's
make sure it's zero otherwise.

While we're at it, make the state-tracker not overwrite MaxAddressRegs
to the same value as it already is.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31538>
 2024-10-10 09:36:43 +00:00
Erik Faye-Lund 12eba85544 mesa: remove superfluous "native" limits and stats 
We don't ever set these to anything else than the same as the non-native
counterparts. Let's drop the members in the first place, and use the
non-native version instead.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31538>
 2024-10-10 09:36:43 +00:00
Erik Faye-Lund cf71e5534b i915: do not calculate native instructions 
This isn't wired up anywhere, so let's just drop it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31538>
 2024-10-10 09:36:43 +00:00
David Rosca 3c5fe03b92 radeonsi/vcn: Add support for VCN5 dpb tier2 
Co-authored-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:21 +00:00
David Rosca 1e1f078099 radeonsi/vcn: Add support for VCN5 AV1 compound 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:21 +00:00
David Rosca 05f7589fec radeonsi/vcn: Fix coded size in sequence header on VCN5 
Introduce coded_width/coded_height for values used in headers
and change it to aligned size on VCN4 to reflect the actual coded size.
VCN5 doesn't have this limitation and can code any size.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:21 +00:00
David Rosca 8b2f0fb574 radeonsi/vcn: Support raw packed headers for AV1 
Same as H264/HEVC, we still write sequence header ourselves
and slice header is sent to FW, everything else gets copied
directly to output bitstream buffer.
Fixes generating correct output with libva-utils/av1encode.
Also fixes temporal delimiter insertion, it's no longer forced
on every frame, but instead it lets application handle it.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:21 +00:00
David Rosca 46d8e57f16 frontends/va: Remove now unused ref fields for AV1 encode 
Need to get rid of these as they allocate buffers for drivers
not implementing create_dpb_buffer and waste memory.
No driver is using these fields anymore.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:20 +00:00
David Rosca 813812b925 radeonsi/vcn: Switch to app DPB management for AV1 
Also move the common part of the frame header into shared function.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:20 +00:00
David Rosca 454a26662d frontends/va: Support raw packed headers for AV1 
When there is show_existing_frame = 1 frame header, we don't parse
it and instead output directly as raw header. Only the frame header
that will be used for encoding current frame is parsed and indicated
with is_slice.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:20 +00:00
David Rosca 1fdd773450 frontends/va: Parse more AV1 frame and sequence header params 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:20 +00:00
David Rosca 36ddcc130b frontends/va: Implement DPB management for AV1 
Same logic as H264 and HEVC, except surfaces are evicted immediately.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:20 +00:00
Christian Gmeiner 3ae3425c5d etnaviv: blt: Convert assert to real if 
etna_try_blt_blit(..) returns if it is possible to do the blit
in hardware or not. When building mesa in debug mode this assert(..)
is hit many times.

Fixes the following piglits on GC7000L:
 - spec@!opengl 1.0@gl-1.0-scissor-copypixels
 - spec@nv_conditional_render@copypixels
 - spec@!opengl 1.1@copypixels-draw-sync
 - spec@!opengl 1.1@copypixels-sync
 - spec@!opengl 1.1@depthstencil-default_fb-blit
 - spec@!opengl 1.1@draw-copypixels-sync
 - spec@!opengl 1.1@gl-1.1-xor-copypixels

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31581>
 2024-10-10 08:31:53 +00:00
Iago Toral Quiroga 4d1971f17f broadcom: fix pairing tmu lookup with previous ldtmu 
There are some restrictions when pairing a new TMU lookup with
a previous LDTMU and we had code to handle this but we were not
limiting the restriction only to TMU lookups.

total instructions in shared programs: 10856992 -> 10823967 (-0.30%)
instructions in affected programs: 1823670 -> 1790645 (-1.81%)
helped: 10212
HURT: 110
Instructions are helped.

total max-temps in shared programs: 2234069 -> 2233153 (-0.04%)
max-temps in affected programs: 15100 -> 14184 (-6.07%)
helped: 660
HURT: 3
Max-temps are helped.

total sfu-stalls in shared programs: 15935 -> 15967 (0.20%)
sfu-stalls in affected programs: 317 -> 349 (10.09%)
helped: 31
HURT: 57
Inconclusive result (%-change mean confidence interval includes 0).

total inst-and-stalls in shared programs: 10872927 -> 10839934 (-0.30%)
inst-and-stalls in affected programs: 1824656 -> 1791663 (-1.81%)
helped: 10199
HURT: 111
Inst-and-stalls are helped.

total nops in shared programs: 185612 -> 185767 (0.08%)
nops in affected programs: 4865 -> 5020 (3.19%)
helped: 164
HURT: 256
Nops are HURT.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31574>
 2024-10-10 06:58:15 +00:00
David Rosca 20d5020ad7 radeonsi/vcn: Fix out of bounds read in H264 decode 
When all 16 references are used, this would read pic->ref[16].
Same for HEVC, but HEVC only uses 15 reference frames so it would
never happen there yet is still reported by coverity.

Fixes coverity issues 1497283 and 1465569 Out-of-bounds read

Cc: mesa-stable

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31558>
 2024-10-10 06:25:36 +00:00
David Rosca 10a7356488 radeonsi/vcn: Fix out of bounds write when invalidating QP map regions 
Fixes coverity issue 1559460 Out-of-bounds write

Fixes: 9c07a2e10d ("radeonsi/vcn: ROI feature implementation")

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31558>
 2024-10-10 06:25:35 +00:00
David Rosca 17842f0584 radeonsi/vcn: Fix some small coverity issues 
* 1619409 Resource leak
  - fix leak when mapping encode bitstream buffer fails
* 1619403 Dereference after null check
  - remove size ptr NULL check in radeon_enc_get_feedback, can't be NULL
* 1434887 Out-of-bounds access
  - use correct variable for memset in get_vp9_msg
* 1619400 'Constant' variable guards dead code
  - remove code handling frame_mbs_only_flag == 0, hardcoded to true

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31558>
 2024-10-10 06:25:35 +00:00
Tapani Pälli f77ffd6b7c drirc/anv: force_vk_vendor=-1 for Silent Hill 2 
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11992
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31573>
 2024-10-10 04:07:12 +00:00
Caio Oliveira c06a55fd39 spirv: Update SPIR-V grammar to use aliases 
For enumerants and instruction names, instead of duplicating the values
now the grammar will use an aliases field to list the alternative names.
Update the Python scripts for that.

The new SPIR-V files correspond to d92cf88c371424591115a87499009dfad41b669c
("Add "aliases" fields to the grammar and remove duplicated (#447)")
in https://github.com/KhronosGroup/SPIRV-Headers.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31369>
 2024-10-10 02:48:00 +00:00
Vignesh Raman d43fec5da9 ci/lava: set exit code in exception case 
Set exit_code to 1 in case of an exception; otherwise,
the job exits with 0, and GitLab shows the job as successful.

Fixes: b9cee06f9e ("ci/lava: handle non-zero exit codes")
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31556>
 2024-10-10 02:16:22 +00:00
Guilherme Gallo 59d909eb56 ci/lava: Make perf jobs use pyutils artifact 
Following the merge of Merge Request #31151, we encountered an issue
where the performance jobs were failing silently. Although these
failures did not cause the pipeline to fail, they resulted in warnings
for all merge requests that ran the .*-traces-performance jobs, putting
critical performance data for the [Mesa Performance Driver
dashboard](https://ci-stats-grafana.freedesktop.org/goto/G3xkvykHg?orgId=1)
at risk.

To resolve this issue, this commit updates the LAVA performance jobs to
utilize the Pyutils artifact package, which is now the only required
artifact for the jobs that run the LAVA job submitter.

Fixes: dd5d737e6c ("ci/lava: Use new pyutils container")

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31553>
 2024-10-10 01:33:16 +00:00
Rob Clark f54748ea38 freedreno/drm: Add preemption support 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00
Rob Clark 753c8bf834 freedreno/a6xx: Emit CP_SET_AMBLE packets 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00
Rob Clark d572fcf04a freedreno/a6xx: Move more state emit per-bin 
With skipsaverestore=1 we can't rely on this values being restored.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00
Rob Clark 270e595811 freedreno/a6xx: Move static regs to preamble IB 
We can re-use this for preemption.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00
Rob Clark 0c36ca7446 freedreno/a6xx: Move PC_TESSFACTOR_ADDR emit 
This depends on batch state, so emit in gmem code.  The remainder of the
static reg initialization can be re-used across batches.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00
Rob Clark f3cc9335e6 freedreno/a6xx: Set bin size per bin 
It is not saved/restored by level 1 preemption with skipsaverestore=1,
so we need to set it for each bin.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00
Rob Clark be6342633c freedreno/a6xx: Cleanup WFIs around RB_CCU_CNTL 
This was only actually needed on the earliest a6xx (probably just
a630?).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00
Rob Clark 3aac51a6d5 freedreno/a6xx: De-open-code VFD_MODE_CNTL 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00
Rob Clark 2f82555efa freedreno/a6xx: Only emit VFD/PC_POWER_CNTL for a6xx 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30544>
 2024-10-10 00:50:46 +00:00