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2024 Commits

Author SHA1 Message Date
Timothy Arceri 5504bebfc4 ac: add support for handling nir_intrinsic_load_vertex_id 
This will be used by radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-28 09:23:49 +11:00
Timothy Arceri 3a0b4187dd ac: fix f2b and i2b for doubles 
Without this llvm was asserting in debug builds.

V2: use LLVMConstNull()

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-28 09:23:49 +11:00
Samuel Pitoiset a549da877b ac/nir: clean up a hack about rounding 2nd coord component 
It's basically just the opposite, and it only makes sense to
round the layer for 2D texture arrays.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-27 10:09:27 +01:00
Dave Airlie 250468f6b7 radv: expose async compute on SI 
It looks like we had all the pieces in place for this,
just never tested it and turned it on.

I don't see any CTS regressions and the computeshader
demo runs.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-27 00:54:59 +00:00
Dave Airlie 1fc19a0f27 radv: merge tess rings into a single bo 
Inspired by a passing commit to radeonsi.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-27 00:54:59 +00:00
Samuel Pitoiset e05507a427 ac/nir: use ordered float comparisons except for not equal 
Original patch from Timothy Arceri, I have just fixed the
not equal case locally.

This fixes one important rendering issue in Wolfenstein 2
(the cutscene transition issue).

RadeonSI uses the same ordered comparisons, so I guess that
what we should do as well.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104302
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104905
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
 2018-02-26 13:59:04 +01:00
Timothy Arceri 9873bd9dcd ac: make use of ac_get_llvm_num_components() helper 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-26 11:43:47 +11:00
James Legg afd8fd0656 radv: Really use correct HTILE expanded words. 
When transitioning to an htile compressed depth format, Set the full
depth range, so later rasterization can pass HiZ. Previously, for depth
only formats, the depth range was set to 0 to 0. This caused unwanted
HiZ rejections with a VK_FORMAT_D16_UNORM depth buffer
(VK_FORMAT_D32_SFLOAT was not affected somehow).

These values are derived from PAL [0], since I can't find the
specification describing the htile values.

[0] https://github.com/GPUOpen-Drivers/pal/blob/5cba4ecbda9452773f59692f5915301e7db4a183/src/core/hw/gfxip/gfx9/gfx9MaskRam.cpp#L1500

CC: Dave Airlie <airlied@redhat.com>
CC: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
CC: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Fixes: 5158603182 "radv: Use correct HTILE expanded words."
 2018-02-24 02:16:22 +01:00
Mauro Rossi 8eed942136 radv/extensions: fix c_vk_version for patch == None 
Similar to cb0d1ba156 ("anv/extensions: Fix VkVersion::c_vk_version for patch == None")
fixes the following building errors:

out/target/product/x86_64/obj_x86/STATIC_LIBRARIES/libmesa_radv_common_intermediates/radv_entrypoints.c:1161:48:
error: use of undeclared identifier 'None'; did you mean 'long'?
      return instance && VK_MAKE_VERSION(1, 0, None) <= core_version;
                                               ^~~~
                                               long
external/mesa/include/vulkan/vulkan.h:34:43: note: expanded from macro 'VK_MAKE_VERSION'
    (((major) << 22) | ((minor) << 12) | (patch))
                                          ^
...
fatal error: too many errors emitted, stopping now [-ferror-limit=]
20 errors generated.

Fixes: e72ad05c1d ("radv: Return NULL for entrypoints when not supported.")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-24 00:31:31 +01:00
Bas Nieuwenhuizen 032870beda radv: Fix autotools build. 
Somewhere along the way the Makefile changes got lost ...

Fixes: 4db78f3a6b "radv: Put supported extensions in a struct."
Acked-by: Dave Airlie <airlied@redhat.com>
 2018-02-23 01:54:12 +01:00
Bas Nieuwenhuizen e72ad05c1d radv: Return NULL for entrypoints when not supported. 
This implements strict checking for the entrypoint ProcAddr
functions.

 - InstanceProcAddr with instance = NULL, only returns the 3 allowed
   entrypoints.
 - DeviceProcAddr does not return any instance entrypoints.
 - InstanceProcAddr does not return non-supported or disabled
   instance entrypoints.
 - DeviceProcAddr does not return non-supported or disabled device
   entrypoints.
 - InstanceProcAddr still returns non-supported device entrypoints.

Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-02-23 00:39:02 +01:00
Bas Nieuwenhuizen 414f5e0e14 radv: Reword radv_entrypoints_gen.py 
With a big inspiration from anv as always ...

Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-02-23 00:39:02 +01:00
Bas Nieuwenhuizen 076f7cfc6b radv: Track enabled extensions. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-02-23 00:39:02 +01:00
Bas Nieuwenhuizen 4db78f3a6b radv: Put supported extensions in a struct. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-02-23 00:39:02 +01:00
Samuel Pitoiset d6b7539206 ac/nir: remove emission of nir_op_fpow 
fpow is now lowered at NIR level.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-22 20:44:46 +01:00
Samuel Pitoiset 7aa008d1d7 radv: enable lowering of fpow to fexp2 and flog2 
There is no fpow in hardware, so it's always lowered somewhere,
but it appears that lowering at NIR level is better. Figured while
comparing compute shaders between RadeonSI and RADV.

Polaris10:
Totals from affected shaders:
SGPRS: 18936 -> 18904 (-0.17 %)
VGPRS: 12240 -> 12220 (-0.16 %)
Spilled SGPRs: 2809 -> 2809 (0.00 %)
Code Size: 718116 -> 719848 (0.24 %) bytes
Max Waves: 1409 -> 1410 (0.07 %)

Vega10:
Totals from affected shaders:
SGPRS: 18392 -> 18392 (0.00 %)
VGPRS: 12008 -> 11920 (-0.73 %)
Spilled SGPRs: 3001 -> 2981 (-0.67 %)
Code Size: 777444 -> 778788 (0.17 %) bytes
Max Waves: 1503 -> 1504 (0.07 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-22 20:40:47 +01:00
Samuel Pitoiset a01e9996b5 ac/nir: set GLC=1 for load/store of coherent/volatile images 
This disables persistence accross wavefronts.

F1 2017 and Wolfenstein 2 appear to use some coherent images
but this patch doesn't seem to change anything.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-22 20:39:55 +01:00
Timothy Arceri 6d338d757f ac/radeonsi: pass type to load_tess_varyings() 
We need this to be able to load 64bit varyings.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-22 09:31:00 +11:00
James Zhu f0ad908e79 amd/common:add uvd hevc enc support check in hw query 
Based on amdgpu hardware query information to check if UVD hevc enc support

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-21 13:53:38 -05:00
Samuel Pitoiset a6accad68f ac/nir: add glsl_is_array_image() helper 
For consistency.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-21 09:41:51 +01:00
Samuel Pitoiset ff83dfb364 ac/nir: set the DA field when performing atomics on 3D images 
This doesn't fix anything known but it should definitely be set.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-21 09:41:49 +01:00
Dave Airlie baa0feb73d radv: don't send num_tcs_input_cp to sgprs. 
We never use it in the shaders.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:36 +00:00
Dave Airlie 952222ddd4 radv/tess: don't need to look in constant for vertices_per_patch 
This just avoids passing this value via user sgprs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:28 +00:00
Dave Airlie 77fd1b9187 ac/radv: cleanup some tcs output values access 
Just consolidates some code to make it easier to change.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:23 +00:00
Dave Airlie 0e6f0d400b ac/radv: remove total_vertices variable 
This just removes an unneeded variable.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:19 +00:00
Dave Airlie e9b9fb3616 ac/radv: don't mark tess inner as used if we don't use it. 
This just avoids marking it as a used output if we don't
actually use it.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:15 +00:00
Dave Airlie d5b2d7ed67 ac/nir: to integer the args to bcsel. 
dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw
was hitting an llvm assert due to one value being an int and the
other a float.

This just casts both values to integer and fixes the test.

Fixes: dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-20 23:15:18 +00:00
Samuel Pitoiset 1ac741d690 ac/nir: move ac_declare_lds_as_pointer() outside of the switch 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-20 10:44:59 +01:00
Samuel Pitoiset b5d111ae76 radv: allow to force family using RADV_FORCE_FAMILY 
Useful for pipeline-db.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-02-20 10:44:47 +01:00
Samuel Pitoiset 549c7f3724 radv: compact varyings after removing unused ones 
It makes no sense to compact before, and the description of
nir_compact_varyings() confirms that.

Polaris10:
Totals from affected shaders:
SGPRS: 108528 -> 108128 (-0.37 %)
VGPRS: 74548 -> 74500 (-0.06 %)
Spilled SGPRs: 844 -> 814 (-3.55 %)
Code Size: 3007328 -> 2992932 (-0.48 %) bytes
Max Waves: 16019 -> 16009 (-0.06 %)

Vega10:
Totals from affected shaders:
SGPRS: 106088 -> 106232 (0.14 %)
VGPRS: 74652 -> 74700 (0.06 %)
Spilled SGPRs: 692 -> 658 (-4.91 %)
Code Size: 2967708 -> 2953028 (-0.49 %) bytes
Max Waves: 18178 -> 18162 (-0.09 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-02-19 12:19:17 +01:00
Marek Olšák 931ec80eeb radeonsi: implement 32-bit pointers in user data SGPRs (v2) 
User SGPRs changes:
    VS:     14 ->  9
    TCS:    14 -> 10
    TES:    10 ->  6
    GS:      8 ->  4
    GSCOPY:  2 ->  1
    PS:      9 ->  5
    Merged VS-TCS: 24 -> 16
    Merged VS-GS:  18 -> 11
    Merged TES-GS: 18 -> 11

SGPRS: 2170102 -> 2158430 (-0.54 %)
VGPRS: 1645656 -> 1641516 (-0.25 %)
Spilled SGPRs: 9078 -> 8810 (-2.95 %)
Spilled VGPRs: 130 -> 114 (-12.31 %)
Scratch size: 1508 -> 1492 (-1.06 %) dwords per thread
Code Size: 52094872 -> 52692540 (1.15 %) bytes
Max Waves: 371848 -> 372723 (0.24 %)

v2: - the shader cache needs to take address32_hi into account
    - set amdgpu-32bit-address-high-bits

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
 2018-02-17 04:52:17 +01:00
Marek Olšák 0977b7f7b3 ac: query high bits of 32-bit address space 2018-02-17 04:51:58 +01:00
Bas Nieuwenhuizen 05d84ed68a radv: Always lower indirect derefs after nir_lower_global_vars_to_local. 
Otherwise new local variables can cause hangs on vega.

CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105098
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-02-15 23:45:59 +01:00
Samuel Pitoiset 579b33c1fd ac/nir: do not reserve user SGPRs for unused descriptor sets 
In theory this might lead to corruption if we bind a descriptor
set which is unused, because LLVM is smart and it can re-use
unused user SGPRs. In practice, this doesn't seem to fix
anything.

As a side effect, this will reduce the number of emitted
SH_REG packets.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-15 14:53:30 +01:00
Samuel Pitoiset 309854148c ac/shader: fix gathering of desc_set_used_mask 
This was quite wrong.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-15 14:53:30 +01:00
Samuel Pitoiset 61a4fc3ecc ac/shader: be a little smarter when scanning vertex buffers 
Although meta shaders don't use any vertex buffers, there is no
behaviour change but I think it's better to do this. Though,
this saves two user SGPRs for push constants inlining or
something else.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-15 14:53:30 +01:00
Timothy Arceri 9740c8a8aa ac: implement nir_intrinsic_image_samples 
Fixes cts test:
KHR-GL45.shader_texture_image_samples_tests.image_functional_test

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-15 09:02:41 +11:00
Timothy Arceri 3ad52501dc ac/nir_to_llvm: fix image size for arrays of arrays 
Fixes cts test:
KHR-GL44.shader_image_size.advanced-changeSize

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-02-15 09:02:41 +11:00
Samuel Pitoiset ad4b58ea70 ac/nir: rename nir_to_llvm_context to radv_shader_context 
There is still more to do in that area, but it's a good start.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:16 +01:00
Samuel Pitoiset 141db61509 ac: remove nir_to_llvm_context from ac_nir_translate() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:14 +01:00
Samuel Pitoiset a541117ff4 ac/nir: remove nir_to_llvm_context::nir link 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:12 +01:00
Samuel Pitoiset e9f0205ca2 ac: move the outputs array to the ABI 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:10 +01:00
Samuel Pitoiset 07e4268f36 ac/shader: scan force_persample 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-14 11:53:08 +01:00
Bas Nieuwenhuizen 7461bd5b8f ac: Use the renumbered const address space for LLVM 7. 
The LLVM AMDGPU backend decided to renumber the constant address
space ....

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-14 01:05:03 +01:00
Timothy Arceri 10457712ed ac/nir: add nir_intrinsic_{load,store}_shared support 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-13 14:43:05 +11:00
Timothy Arceri c787cbfa33 ac/nir_to_llvm: add support for nir_intrinsic_shared_atomic_* 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-02-13 14:43:05 +11:00
Eric Anholt 1aed66dc1e radv: Fix compiler warning about uninitialized 'set' 
The compiler doesn't figure out that we only get result == VK_SUCCESS if
set got initialized.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 20:48:47 +00:00
Eric Anholt 091bff8317 ac/nir: Fix compiler warning about uninitialized dw_addr. 
Even switching the def's condition to be the same chip revision check as
the use, the compiler doesn't figure it out.  Just NULL-init it.

Fixes: ec53e52742 ("ac/nir: Add ES output to LDS for GFX9.")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 20:48:29 +00:00
Samuel Pitoiset f4e85ba93f ac/nir: remove backlink to nir_to_llvm_context 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:39 +01:00
Samuel Pitoiset be5f6eb13e ac/nir: remove nir_to_llvm_context::module 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-12 11:54:36 +01:00