54cd43f93e
radv: promote VK_KHR_maintenance5 to core 1.4 API
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32432 >
2024-12-03 10:21:55 +00:00
81798d9ebe
radv: promote VK_KHR_line_rasterization to core 1.4 API
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32432 >
2024-12-03 10:21:55 +00:00
6a3944a195
radv: On GFX11, use box sorting heuristic based on ray flags
...
Use box with largest ray interval for shadow rays (terminate on first
hit) as it maximizes the probability of finding some object in that box;
for reflection (closest hit) rays, use midpoint instead, which defers
processing of larger boxes the ray origin is in in favor of smaller
boxes closer to origin.
Since the sorting mode must be uniform, when terminate_on_first_hit flag
is divergent, we leave it as closest.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32416 >
2024-12-01 05:20:58 +00:00
930243bf36
radv: Reorder potentially per-primitive FS builtins.
...
There are some FS built-ins that can be per-vertex or
per-primitive depending on whether a mesh shader is used:
primitive ID (implicit in VS), layer and viewport.
However, the HW requires per-primitive FS inputs to be ordered last.
This causes bugs when the same unlinked FS is used together
with VS/TES/GS and MS (with unlinked ESO or fast-linked GPL).
To solve this problem, we reorder the FS inputs so that these
potentially per-primitive inputs go after per-vertex inputs but
before per-primitive inputs.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32220 >
2024-11-28 18:14:56 +00:00
25d4943481
nir: make use_interpolated_input_intrinsics a nir_lower_io parameter
...
This will need to be set to true when the GLSL linker lowers IO, which
can later be unlowered by st/mesa, and then drivers can lower it again
without load_interpolated_input. Therefore, it can't be a global
immutable option.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32229 >
2024-11-20 02:45:37 +00:00
a7ba36f589
ac/nir: get pass_tessfactors_by_reg from nir_gather_tcs_info
...
If nir_tcs_info::all_invocations_define_tess_levels is true, the pass
doesn't have to insert a barrier and use output loads to get tess level
output values. It can just use the SSA defs that are being stored (or phis
thereof) to get the tess level output values.
The remaining tcs_info fields will be used by the HS shader message.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32171 >
2024-11-16 21:58:29 -05:00
ee452129c6
nir: add cull_triangles_, cull_lines_ prefixes to viewport_xy_scale_and_offset
...
for radeonsi
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31865 >
2024-10-29 16:47:44 +00:00
2227f5be9d
nir: rename load_cull_small_primitive_precision -> triangle, add line_precision
...
for radeonsi
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31865 >
2024-10-29 16:47:44 +00:00
0914e0d02f
nir: rename load_cull_small_primitives -> triangles, add load_cull_small_lines
...
for radeonsi
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31865 >
2024-10-29 16:47:44 +00:00
4383a917e6
radv: optimize VS input load components to constants earlier
...
This helps some linking optimizations.
fossil-db (navi21):
Totals from 2262 (2.85% of 79395) affected shaders:
MaxWaves: 57680 -> 57738 (+0.10%); split: +0.11%, -0.01%
Instrs: 1061526 -> 1053937 (-0.71%); split: -0.79%, +0.07%
CodeSize: 5766352 -> 5736784 (-0.51%); split: -0.60%, +0.08%
VGPRs: 89376 -> 89000 (-0.42%); split: -0.43%, +0.01%
Latency: 4102938 -> 4059773 (-1.05%); split: -1.14%, +0.08%
InvThroughput: 1105885 -> 1092291 (-1.23%); split: -1.24%, +0.01%
VClause: 18917 -> 18972 (+0.29%); split: -0.12%, +0.41%
SClause: 28839 -> 28115 (-2.51%); split: -3.32%, +0.81%
Copies: 73396 -> 72671 (-0.99%); split: -1.63%, +0.65%
PreSGPRs: 65866 -> 65838 (-0.04%); split: -0.22%, +0.17%
PreVGPRs: 69752 -> 69278 (-0.68%)
VALU: 680351 -> 673489 (-1.01%); split: -1.03%, +0.02%
SALU: 121459 -> 121515 (+0.05%); split: -0.00%, +0.05%
VMEM: 29632 -> 30021 (+1.31%); split: -0.02%, +1.33%
SMEM: 73744 -> 73836 (+0.12%); split: -0.01%, +0.14%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31593 >
2024-10-21 15:52:53 +00:00
dbf63a0788
nir: remove nir_op_is_derivative
...
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31014 >
2024-10-17 09:50:19 +00:00
64c406774f
radv/rt: Skip all AABB code when no_skip_aabbs is not set
...
This avoids having to execute the load_global just to throw the results
away and ignore the node.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31443 >
2024-10-03 15:22:08 +00:00
25b09b9c5a
radv: Fix report_ray_intersection affecting terminated rays
...
Fixes dEQP-VK.ray_tracing_pipeline.amber.flags-accept-first.
cc: mesa-stable
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31186 >
2024-09-24 16:18:31 +00:00
bf41cf2eef
radv/rt: don't split array/struct payload variables
...
If the shader has multiple payload variables, split passes might not
preserve the order and this can cause the offsets used for the stores to
not match the payload offsets for nir_intrinsic_trace_ray.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31204 >
2024-09-24 15:41:04 +00:00
204e446bcd
radv/rt: align constant data by 64 when inlining shaders
...
There's never any need for anything higher. If this were too high (such
as NIR_ALIGN_MUL_MAX), it would have caused issues.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31204 >
2024-09-24 15:41:04 +00:00
a0951bae70
radv: use only one user SGPR for all NGG state
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31160 >
2024-09-24 06:00:00 +00:00
00c94e0cd4
radv: Workaround apps using ray tracing when it is unsupported
...
Emitting bvh64_intersect_ray_amd will crash the compiler on pre-GFX10_3
hardware.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11786
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30886 >
2024-09-23 14:02:28 +00:00
ad3e6bb06a
radv: fix lowering VS inputs when offset >= stride on GFX6-7
...
This was supposed to be >=.
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31209 >
2024-09-18 07:21:28 +00:00
656d7e887a
radv: fix lowering the view index to an input varying for FS
...
When multiview is used and the FS is compiled separately with GPL, the
view index still needs to be lowered, otherwise it's crashing later.
The lowering doesn't need to know the previous stage because ViewIndex
is a global thing (ie. it's neither a per-vertex or a per-primitive
varying).
This fixes recent
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.other.view_index_from_device_index_*_pre_rasterization
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31192 >
2024-09-17 06:36:08 +00:00
fcb2c62b63
radv: Add NIR XFB IO intrinsic info to legacy stages not just NGG.
...
Some NIR passes (such as nir_opt_varyings) rely on having the
XFB info in explicit I/O intrinsics. If we want to use those,
we need to add this info.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676 >
2024-09-06 09:16:21 +00:00
4d5bc893b4
ac/nir/tess: Remove no_inputs_in_lds.
...
When there are no VS outputs, we expect that the drivers set
the LS-HS vertex stride to zero, which will produce the
same result as no_inputs_in_lds did.
Remove the unnecessary code path from the output lowering.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30962 >
2024-09-05 19:54:29 +00:00
52c41f25de
ac/nir/tess: don't allocate LDS for HS inputs that are passed via VGPRs
...
Right now we don't allocate LDS for HS inputs when all HS inputs are passed
via VGPRs.
This changes it to skip allocating exactly the HS inputs passed via VGPRs
by reducing the inputs_read mask to remove holes.
radeonsi changes to the LDS allocation will be in a different MR.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30962 >
2024-09-05 19:54:29 +00:00
6d83389a39
ac/nir/esgs: Add gs_inputs_read to ES output lowering.
...
This commit just adds the field, it will be taken into use
in a following commit.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812 >
2024-08-08 16:55:02 +00:00
b5f53fdf32
ac/nir/tess: Add tcs_inputs_read to LS output lowering.
...
This commit just adds the field, it will be taken into use
in a following commit.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29812 >
2024-08-08 16:55:02 +00:00
048173a55a
radv: use glsl function name for dFdxfine
...
since fddx isn't a name used anywhere now
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30565 >
2024-08-08 15:26:07 +00:00
530498cb83
treewide: use new-style derivative builders
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Jesse Natalie <jenatali@microsoft.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30565 >
2024-08-08 15:26:07 +00:00
97aa3464b9
radv/rt: remove one VALU from traversal loop
...
Not much, but something, I guess?
Foz-DB Navi31:
Totals from 93 (0.12% of 79395) affected shaders:
MaxWaves: 1338 -> 1354 (+1.20%)
Instrs: 3689907 -> 3689721 (-0.01%); split: -0.01%, +0.00%
CodeSize: 18921812 -> 18922920 (+0.01%); split: -0.00%, +0.01%
VGPRs: 9012 -> 8988 (-0.27%)
Latency: 23153748 -> 23167640 (+0.06%)
InvThroughput: 4490882 -> 4493136 (+0.05%)
Copies: 287888 -> 287728 (-0.06%)
VALU: 2022082 -> 2021916 (-0.01%)
SALU: 458904 -> 459064 (+0.03%)
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30342 >
2024-07-25 20:24:23 +00:00
ca88783318
radv/nir: add a pass to optimize shuffle/booleans dependent only on tid/consts
...
This pass uses constant folding to determine which invocation is read by shuffle
for each invocation. Then, it detects patterns in the result and uses more
a specialized intrinsic if possible.
For booleans it creates inverse_ballot.
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24650 >
2024-07-17 15:04:38 +00:00
0208927bcf
radv: Always use dynamic line smoothing
...
Static enablement is too complex for a feature that is barely used.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26833 >
2024-07-05 08:58:53 +00:00
dd85b50d18
treewide: use nir_break_if
...
Via Coccinelle patch and some manual hunk editing:
@@
expression b, E;
@@
-nir_push_if(b, E);
-{
-nir_jump(b, nir_jump_break);
-}
-nir_pop_if(b, NULL);
+nir_break_if(b, E);
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29877 >
2024-06-26 19:07:35 +00:00
da752ed7c1
treewide: use nir_def_replace sometimes
...
Two Coccinelle patches here. Didn't catch nearly as much as I would've liked but
it's a start.
Coccinelle patch:
@@
expression intr, repl;
@@
-nir_def_rewrite_uses(&intr->def, repl);
-nir_instr_remove(&intr->instr);
+nir_def_replace(&intr->def, repl);
Coccinelle patch:
@@
identifier intr;
expression instr, repl;
@@
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
...
-nir_def_rewrite_uses(&intr->def, repl);
-nir_instr_remove(instr);
+nir_def_replace(&intr->def, repl);
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com > [broadcom]
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com > [lima]
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com > [etna]
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com > [r300]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29817 >
2024-06-21 15:36:56 +00:00
5c6c8182c8
radv: inline partial push constant loads
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29675 >
2024-06-20 12:09:29 +00:00
edbb75ce3a
radv: lower push constants in NIR
...
fossil-db (navi21):
Totals from 879 (1.11% of 79395) affected shaders:
Instrs: 1359371 -> 1360237 (+0.06%); split: -0.02%, +0.08%
CodeSize: 7290856 -> 7294308 (+0.05%); split: -0.01%, +0.06%
SpillSGPRs: 751 -> 800 (+6.52%)
Latency: 21923904 -> 21923983 (+0.00%); split: -0.03%, +0.03%
InvThroughput: 7029748 -> 7029528 (-0.00%); split: -0.03%, +0.03%
VClause: 23595 -> 23610 (+0.06%)
SClause: 31819 -> 32256 (+1.37%); split: -0.07%, +1.44%
Copies: 109175 -> 110089 (+0.84%); split: -0.13%, +0.97%
Branches: 32068 -> 32072 (+0.01%); split: -0.02%, +0.03%
PreSGPRs: 41831 -> 41774 (-0.14%); split: -0.15%, +0.01%
PreVGPRs: 53605 -> 53604 (-0.00%)
VALU: 1020426 -> 1020521 (+0.01%); split: -0.00%, +0.01%
SALU: 135931 -> 136850 (+0.68%); split: -0.08%, +0.76%
SMEM: 51688 -> 51686 (-0.00%)
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29675 >
2024-06-20 12:09:28 +00:00
15257b65c6
treewide: use nir_metadata_control_flow
...
Via Coccinelle patch:
@@
@@
-nir_metadata_block_index | nir_metadata_dominance
+nir_metadata_control_flow
...plus some manual fixups for call sites missed by coccinelle.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Acked-by: Karol Herbst <kherbst@redhat.com >
Acked-by: Juan A. Suarez Romero <jasuarez@igalia.com > [broadcom]
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com > [lima]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29745 >
2024-06-17 16:28:14 -04:00
aa9dfcad50
radv/nir: lower nir_intrinsic_load_xfb_state_address_gfx12_amd
...
This intrinsic returns a 64-bit address that points to the streamout
state buffer.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29676 >
2024-06-17 14:46:36 +00:00
2aaa6ebba1
build/amd: add amd-use-llvm build option
...
this allows amd drivers to disable llvm support while still allowing
llvmpipe/lavapipe to be built
by disabling llvm support in amd drivers, the load times for these drivers
decreases by 5-10ms
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Tested-by: Mike Lothian <mike@fireburn.co.uk >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28969 >
2024-05-30 19:05:00 +00:00
be49b02f05
radv: Properly link TCS->TES IO again.
...
This commit makes RADV TCS->TES IO great again.
Fossil DB stats on Navi 21:
Totals from 2634 (3.32% of 79395) affected shaders:
MaxWaves: 56336 -> 56450 (+0.20%)
Instrs: 1670370 -> 1667819 (-0.15%); split: -0.22%, +0.06%
CodeSize: 8675476 -> 8643176 (-0.37%); split: -0.39%, +0.01%
VGPRs: 126776 -> 126608 (-0.13%)
LDS: 10444288 -> 10617856 (+1.66%)
Inputs: 30910 -> 25426 (-17.74%)
Outputs: 27000 -> 21516 (-20.31%)
Latency: 9403584 -> 9391648 (-0.13%); split: -0.25%, +0.12%
InvThroughput: 2127488 -> 2127180 (-0.01%); split: -0.13%, +0.12%
VClause: 33495 -> 34413 (+2.74%); split: -0.32%, +3.06%
SClause: 27905 -> 27879 (-0.09%); split: -0.30%, +0.20%
Copies: 82562 -> 83007 (+0.54%); split: -0.32%, +0.86%
PreSGPRs: 91029 -> 91014 (-0.02%)
PreVGPRs: 108505 -> 108473 (-0.03%); split: -0.06%, +0.03%
VALU: 1088113 -> 1087730 (-0.04%); split: -0.18%, +0.14%
SALU: 182853 -> 179541 (-1.81%); split: -1.82%, +0.01%
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29436 >
2024-05-30 12:28:51 +00:00
432f3eb9ca
radv/rt: Track ray_launch_size reads
...
Totals from 33 (8.71% of 379) affected shaders:
Instrs: 1434025 -> 1433988 (-0.00%); split: -0.01%, +0.00%
CodeSize: 7578824 -> 7578472 (-0.00%); split: -0.01%, +0.00%
Latency: 9241632 -> 9241639 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3407014 -> 3407049 (+0.00%); split: -0.00%, +0.00%
VClause: 40399 -> 40391 (-0.02%)
SClause: 37755 -> 37760 (+0.01%); split: -0.04%, +0.05%
Copies: 169588 -> 169567 (-0.01%); split: -0.04%, +0.02%
PreSGPRs: 4323 -> 4319 (-0.09%)
VALU: 940500 -> 940484 (-0.00%); split: -0.00%, +0.00%
SALU: 220508 -> 220509 (+0.00%); split: -0.03%, +0.03%
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619 >
2024-05-28 12:23:45 +00:00
7ba8fccad3
radv/rt: Track ray_launch_id reads
...
We can expect the z-component to be unused most of the times. Avoid
preserving it in those cases.
Totals from 94 (24.80% of 379) affected shaders:
MaxWaves: 916 -> 935 (+2.07%)
Instrs: 3316697 -> 3318357 (+0.05%); split: -0.06%, +0.11%
CodeSize: 17618704 -> 17616680 (-0.01%); split: -0.09%, +0.08%
VGPRs: 11632 -> 11520 (-0.96%)
SpillSGPRs: 1139 -> 1205 (+5.79%); split: -0.35%, +6.15%
Latency: 22595907 -> 22598225 (+0.01%); split: -0.15%, +0.16%
InvThroughput: 7036479 -> 6923740 (-1.60%); split: -1.74%, +0.14%
VClause: 104325 -> 104361 (+0.03%); split: -0.16%, +0.19%
SClause: 83920 -> 83925 (+0.01%); split: -0.08%, +0.08%
Copies: 328140 -> 330687 (+0.78%); split: -0.27%, +1.05%
Branches: 134521 -> 134541 (+0.01%); split: -0.01%, +0.02%
PreSGPRs: 8753 -> 8806 (+0.61%)
PreVGPRs: 10984 -> 10937 (-0.43%)
VALU: 2149880 -> 2151318 (+0.07%); split: -0.08%, +0.15%
SALU: 499107 -> 499128 (+0.00%); split: -0.08%, +0.09%
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619 >
2024-05-28 12:23:45 +00:00
074f3cfe73
radv: use new common helpers for building buffer descriptor
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29268 >
2024-05-22 08:31:39 +00:00
58a5de5c34
amd: add gfx12 register definitions into the register header generator
...
The generator renamed some definitions to resolve conflicts.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Acked-by: Timur Kristóf <timur.kristof@gmail.com >
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29007 >
2024-05-11 22:14:05 -04:00
c533a79878
radv: implement VK_KHR_dynamic_rendering_local_read
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27263 >
2024-05-07 10:35:04 +00:00
e5bc4d85bb
radv: precompute existing legacy GS register values later
...
To precompute all registers at the same place.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29022 >
2024-05-06 18:00:02 +00:00
afb08ee244
radv: Run DCE before deleting I/O variables.
...
Apparently, nir_lower_io leaves dead code in shaders, which
prevented us from deleting the IO variables properly.
Fixes: dbfb96f08ftimur.kristof@gmail.com >
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28764 >
2024-04-18 18:35:07 +00:00
0e481a4adc
radv: Always use fixed I/O locations for TCS outputs in VRAM.
...
The goal of this patch is to make the TCS->TES shader I/O
independent of assigned I/O driver locations.
Always using the unlinked approach means a larger stride when
calculating some memory addresses, but otherwise should have no
perf impact whatsoever, because this only affects how TCS
outputs are stored to VRAM, and doesn't affect how they are
stored in LDS.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28488 >
2024-04-11 00:44:45 +00:00
87fde606cf
radv: use SPDX-License-Identifier
...
Only files under src/amd/vulkan/** are concerned.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28599 >
2024-04-08 07:17:31 +00:00
a554e44eae
radv: Use NIR IO semantics for VS input location mapping.
...
The IO semantics already contain all the information needed
for VS inputs, so there is no need use driver locations.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28553 >
2024-04-05 15:24:43 +02:00
69b911bc53
radv: remove radv_private.h
...
This file was a giant mess and I'm very happy to remove it entirely.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28568 >
2024-04-04 21:57:46 +00:00
b409936e97
radv: add missing endif comment for some headers
...
For consistency.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28568 >
2024-04-04 21:57:45 +00:00
dbfb96f08f
radv: Remove I/O variables after nir_lower_io.
...
They are not needed anymore.
Both NIR and RADV shader info can be fully deduced from I/O
intrinsics, so there is no need to keep the variables.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28506 >
2024-04-04 15:43:56 +00:00
Samuel Pitoiset