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Author SHA1 Message Date
Marcin Ślusarz 446eeccb1c intel/compiler: fix mesh urb write regression 
Right now even the simplest mesh test (func.mesh.basic.mesh from crucible) fails like this:
ASSERT: Scalar MESH validation failed!
load_payload(16) vgrf11+0.0:F, vgrf8:D
../../src/intel/compiler/brw_fs_validate.cpp:61: inst->dst.offset / REG_SIZE + regs_written(inst) <= alloc.sizes[inst->dst.nr]
Because we try to load 8 regs with LOAD_PAYLOAD in SIMD16 mode.

Fixes: 349a040f68 ("intel/fs: Make logical URB write instructions more like other logical instructions")

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18075>
 2022-08-18 17:48:41 +00:00
Ikshwaku Chauhan ddc8ab9e43 Revert "radeon: add EFC support to only VCN2.0 devices" 
This reverts commit 23e5b910c5.

Reason for revert:
It's causing the regression for H264 transcoding. We will Enable EFC
once we verify all corner cases and as of now disabling

Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17869>
 2022-08-18 17:33:33 +00:00
Kenneth Graunke 1ef43ea3c4 iris: Fix PIPE_CAP_UMA 
If we have VRAM we're not exactly a unified memory architecture, are we?

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18123>
 2022-08-18 17:05:35 +00:00
Kenneth Graunke 2cea0d6ef6 intel/compiler: Drop variable group size lowering 
This backend lowering code has been dead since the removal of i965 -
nothing in the current source tree ever sets the flag.

This is handled by iris_setup_uniforms() and crocus_setup_uniforms().
Variable group size does not appear to be a feature in anv.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18055>
 2022-08-18 16:17:03 +00:00
Dmitry Osipenko 79f47249e8 llvmpipe: Align persistent mappings to page size 
KVM requires memory mapping to be aligned to page size, otherwise it
refuses to do the mapping. In particular this causes KVM mapping errors
when llvmpipe is used by virtio-gpu on host and guest tries to map buffer
that has a persistent mapping, i.e. it tries to map the llvmpipe's host
blob/buffer. Mesa virgl driver uses host blobs only for the buffers with
persistent mapping, hence let's align buffer allocations to the page size
when the persistence flag is set to fix the KVM fault.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18053>
 2022-08-18 15:51:40 +00:00
Mike Blumenkrantz 49efa73ba1 zink: try to reuse swapchain modifier for dmabuf export 
the non-negotiated path assumes that drivers know what implicit modifiers they're
using, but zink doesn't know what it's doing, so instead try to copy the
swapchain's modifier and reuse that since in theory it should work

Fixes: 247b8f2924 ("zink: add all format modifiers when adding for dmabuf export")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18095>
 2022-08-18 14:38:15 +00:00
Mike Blumenkrantz f7b1ef37c0 zink: iterate over all modifiers and nuke the ones that aren't supported 
the spec mandates that all modifiers passed to the driver be valid, so
iterate through all of them and delete the invalid ones

Fixes: 247b8f2924 ("zink: add all format modifiers when adding for dmabuf export")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18095>
 2022-08-18 14:38:15 +00:00
Mike Blumenkrantz 63d70d6dd9 zink: bail out of dmabuf resource creation when srgb explosion is expected 
if srgb-ness isn't supported by the driver for dmabuf, bail out early with an
error message with the assumption that this would later (maybe) explode when
trying to create a view for srgb framebuffer

ref !17900

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18095>
 2022-08-18 14:38:15 +00:00
Jesse Natalie 04e4de6fae microsoft/compiler: Fix PSV struct when numthreads is 0 
Fixes: d9e575d4 ("microsoft/compiler: DXIL validator 1.6 uses a new PSV struct version")
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18023>
 2022-08-18 14:20:08 +00:00
Jesse Natalie f44ca247d4 dxil_nir_lower_int_cubemaps: When not lowering samplers, don't touch sampler types 
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18025>
 2022-08-18 14:03:05 +00:00
Jesse Natalie 34294bd9bb microsoft/compiler: Discard shouldn't be marked readnone 
Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18034>
 2022-08-18 06:44:22 -07:00
Georg Lehmann 2dd641119f aco: Force tex operand to have the correct sub dword size before packing. 
get_ssa_temp's and NIR's bit size can differ for scalar sources.
This causes broken packing of the MIMG operands with A16/G16.

Fixes: f5f73db846 ("aco: Support 16bit sources for texture ops.")
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18008>
 2022-08-18 14:42:28 +02:00
Victor Hermann Chiletto 70871aa50c radv: refactor descriptor set layout tracking 
Separately track descriptor set layouts for pools with
FREE_DESCRIPTOR_SET disabled, instead of reusing
`radv_descriptor_pool::entries`. This saves 8 bytes for each entry and
also avoids some indirection.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16541>
 2022-08-18 04:24:39 -03:00
Yonggang Luo f97ba1f95d c11: #include <threads.h> when the os/platform provide it 
Closes #6964

CC: mesa-stable

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18043>
 2022-08-18 01:02:07 +00:00
Rob Clark f228c26520 llvmpipe: Add some missing locking 
The lp_rasterizer is shared across contexts, and lp_rast_fence called
without holding rast_mutex could race with rast_mutex being replaced and
unref'd on a different thread.

Fixes: a680fd078c ("llvmpipe: make last_fence a screen/rast object not a context one.")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18116>
 2022-08-18 00:27:36 +00:00
Mike Blumenkrantz 37aa92a3cd nir: add uses_bindless flag for shader_info 
this is cumbersome to detect, so detect it here

the flag denotes the use of either bindless texture operations
or shader variables such that drivers can infer the use of bindless
descriptor management functionality

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18088>
 2022-08-17 21:53:02 +00:00
Rob Clark aaeb5bea29 egl/dri2: Error path cleanups 
Simplify things for the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark a4cd1bc9b7 egl/dri2: Indenting fix 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark 7fcdc07aaa egl: Add some locking asserts 
Make it obvious if we screw up while reworking locking.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark a020e9e70a egl: Convert to simple_mtx_t 
Mostly because simple_mtx_assert_locked() will come in handy during
locking re-work.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark 8c34ea69d8 egl: Remove redundant fxn param 
*Technically* we should be unlocking with the 'disp' and not the 'dpy'
(even though they are the same thing).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark 7d55729ae5 egl: Drop unused _EGL_FUNC_START() arg 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark c11583b164 egl: Drop _eglSetFuncName() return 
It always returned EGL_TRUE

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark 45d9c94a28 util: Fix vs2019 build error 
Needed for dependency on MAX_INT.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark bacb04ef62 freedreno/drm/virtio: Add some atrace 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark b69cbc0caa egl: atrace support 
Perfetto is showing mutex contention on disp->Mutex when multiple
threads are making egl calls on their own current context.  This
makes it easier to see what is contending with what.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Rob Clark 2d0d867935 freedreno/drm: Avoid lock in fd_pipe_del() 
If we aren't dropping the last refcnt we don't need the lock.  This
avoids contention between retire-queue against others.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18111>
 2022-08-17 21:17:17 +00:00
Samuel Pitoiset 93fa687808 radv: do not compress DCC in presence of render loops on GFX10+ 
DCC shouldn't be compressed for Vulkan feedback loops (ie. render pass
with input attachments). It looks like it has always been broken...
Note that GFX9 and earlier chips aren't affected because they don't
compress DCC on GENERAL.

This fixes
dEQP-VK.rasterization.rasterization_order_attachment_access.format*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18104>
 2022-08-17 22:43:39 +02:00
Charmaine Lee 854e8797ac svga: support TGSI_SEMANTIC_TEXCOORD in swtnl draw context 
Since PIPE_CAP_TGSI_TEXCOORD is now enabled, texcoord is now declared
as TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.

Fixes assert running REDTurbineDEMO with MTL Renderer when the guest needs to
fallback to swtnl for line stipple.

Fixes: e73443b7a5 ("svga: enable PIPE_CAP_TGSI_TEXCOORD for vgpu10 and up")

Reviewed-by: Martin Krastev <krastevm@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18113>
 2022-08-17 19:52:36 +00:00
Alyssa Rosenzweig d7e6174c2b pan/mdg: Remove disassembler stats 
They're now unused and they were never especially useful.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:56 +00:00
Alyssa Rosenzweig 76e8f8b40e pan/decode: Clean up _bifrost_ decode routines 
It's noisy since Bifrost was introduced, unnecessary since we converted to
per-arch GenXML, and wrong since Valhall was added.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:56 +00:00
Alyssa Rosenzweig 5c00efa695 pan/decode: Centrally declare pandecode entrypoints 
Deduplicate in preparation for CSF.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig aba69fc9c8 pan/decode: Defeature disassembler stats 
Architecturally, these only work for Midgard, and even on Midgard didn't turn
out to be too useful. While we're removing pandecode cruft, let's remove the
stats that just add noise to Bifrost and Valhall (and largely just noise to
Midgard too).

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 6dfd0998f2 pan/decode: Unify SFBD/MFBD decoding 
It's the same core logic. Unify and let GenXML do its thing.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig e88b4949de pan/decode: Reorder MFBD decoding 
Eliminate some #ifdef by grouping v5 and v6 state separately.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 504022454c pan/decode: Simplify pandecode_fbd 
Remove unsued width/height properties, and use cleaner C syntax to build the
return value.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 9621df9637 pan/decode: Stop passing suffixes around 
Unused.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 42319c6b6d pan/decode: Stop passing job index around 
There are a lot of problems with passing job_index around:

* Almost entirely unused
* Not particularly helpful even when used
* Mostly ignored for Valhall already
* Doesn't extend to CSF

It only really exists due to the early days of pandecode generating valid C code
as the trace format. With GenXML instead, that's not applicable.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig 3298ac4b12 pan/decode: Remove pandecode_msg 
It hasn't had a consistent semantic meaning since we've switched decoding over
to GenXML.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Alyssa Rosenzweig c4c3f246fe pan/decode: Don't pass around memory handles 
The hardware doesn't care what BO a given buffer resides in, only what GPU
address it's at. It's simpler to fetch from a GPU address, rather than the pair
of a GPU address and a backing allocation. This cleans up a lot of cruft in
pandecode.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
 2022-08-17 17:25:55 +00:00
Mark Collins f649233896 tu: Implement VK_EXT_non_seamless_cube_map 
Passes CTS tests: dEQP-VK.texture.*non_seamless_*

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18079>
 2022-08-17 16:56:54 +00:00
Friedrich Vock adb4934d59 radv/winsys: Return VK_ERROR_INVALID_EXTERNAL_HANDLE if buffer imports fail 
Section 11.2.6 of the Vulkan spec states:
"Importing memory from a particular host pointer may not be possible due to
 additional platform-specific restrictions beyond the scope of this
 specification in which case the implementation must fail the memory
 import operation with the error code VK_ERROR_INVALID_EXTERNAL_HANDLE_KHR."

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17995>
 2022-08-17 11:22:11 +00:00
Pierre-Eric Pelloux-Prayer fddb4eda2f radeonsi: prevent u_blitter recursion in si_update_ps_colorbuf0_slot 
When u_blitter calls util_blitter_restore_fragment_states we may
end up in si_update_ps_colorbuf0_slot.
This commit makes sure we don't call u_blitter from there.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6921
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17981>
 2022-08-17 12:03:46 +02:00
Samuel Pitoiset 6b91ca7ce0 radv: add a very initial implementation of VK_EXT_graphics_pipeline_library 
This experimental and very suboptimal implementation of graphics
pipeline library shouldn't be used by anyone, except for development
purposes. It's still under active development from my side. This
extension is only exposed via RADV_PERFTEST=gpl anyways.

It's very suboptimal because RADV doesn't yet support PS epilogs and
VS prologs need to be improved/reworked because GPL changed the logic
(eg. can't know the next stage when compiling a prolog). So, currently
the driver ALWAYS retains NIR shaders during libs creation and it links
and compiles in the final pipeline.

I have WIP branches for approximately everything but it looks simpler
to start merging an initial implementation in order to improve steps
by steps from main. This commit might look simple and short but I
already merged TON of preliminary work. RADV was definitely not ready
for GPL and it's still not completely fine. Expect refactoring again.

This implementation currently pass
dEQP-VK.pipeline.pipeline_library.* on NAVI21, except few feedback
creation tests due to CTS bugs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:37:43 +02:00
Samuel Pitoiset 390a1bbdb3 radv: prevent accessing rasterization state when it's NULL 
It might be NULL for gfx pipeline libs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:58 +02:00
Samuel Pitoiset d8af521add radv: store vk_graphics_pipeline_state to radv_graphics_pipeline 
For gfx pipeline libraries we would have to keep track of the gfx
state, so change how it's allocated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:57 +02:00
Samuel Pitoiset bb6ec3067d radv: introduce a new pipeline type for graphics libs 
It currently inherits from radv_graphics_pipeline because it's simpler
but I think it could be improved because most of fields won't be useful
for libs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:57 +02:00
Samuel Pitoiset 075a35e0ad radv: add radv_graphics_pipeline_import_info() helper 
It also initializes dynamic states and active stages. It will also be
used when creating a graphics pipeline library.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:57 +02:00
Samuel Pitoiset a5f3a21261 radv: remove unused pCreateInfo from radv_pipeline_init_blend_state() 
I missed this one last time.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17542>
 2022-08-17 09:34:57 +02:00
Danylo Piliaiev c45fded26b tu: Disable LRZ write when alpha-to-coverage is enabled 
Alpha-to-coverage acts like discard and happens after FS ends,
so like with discard LRZ write should be disabled.
With discard we don't know at the moment of binning whether
fragment would be not discarded, so we cannot write its depth to LRZ.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6876

Cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18083>
 2022-08-17 05:21:46 +00:00