pan/mdg: Remove disassembler stats
They're now unused and they were never especially useful. Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18094>
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@@ -54,7 +54,6 @@ typedef enum {
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typedef struct {
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unsigned *midg_tags;
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struct midgard_disasm_stats midg_stats;
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/* For static analysis to ensure all registers are written at least once before
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* use along the source code path (TODO: does this break done for complex CF?)
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@@ -187,12 +186,6 @@ print_alu_reg(disassemble_context *ctx, FILE *fp, unsigned reg, bool is_write)
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if (reg >= 16 && reg <= 23)
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is_uniform = true;
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/* Update the uniform count appropriately */
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if (is_uniform)
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ctx->midg_stats.uniform_count =
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MAX2(uniform_reg + 1, ctx->midg_stats.uniform_count);
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if (reg == REGISTER_UNUSED || reg == REGISTER_UNUSED + 1)
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fprintf(fp, "TMP%u", reg - REGISTER_UNUSED);
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else if (reg == REGISTER_TEXTURE_BASE || reg == REGISTER_TEXTURE_BASE + 1)
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@@ -685,10 +678,8 @@ update_dest(disassemble_context *ctx, unsigned reg)
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/* We should record writes as marking this as a work register. Store
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* the max register in work_count; we'll add one at the end */
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if (reg < 16) {
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ctx->midg_stats.work_count = MAX2(reg, ctx->midg_stats.work_count);
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if (reg < 16)
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ctx->midg_ever_written |= (1 << reg);
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}
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}
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static void
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@@ -868,7 +859,6 @@ print_vector_field(disassemble_context *ctx, FILE *fp, const char *name,
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shrink_mode, src_mask, is_int, argmod);
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}
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ctx->midg_stats.instruction_count++;
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fprintf(fp, "\n");
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}
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@@ -958,7 +948,6 @@ print_scalar_field(disassemble_context *ctx, FILE *fp, const char *name,
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} else
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print_scalar_src(ctx, fp, is_int, alu_field->src2, reg_info->src2_reg);
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ctx->midg_stats.instruction_count++;
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fprintf(fp, "\n");
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}
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@@ -1033,7 +1022,6 @@ static bool
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print_compact_branch_writeout_field(disassemble_context *ctx, FILE *fp, uint16_t word)
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{
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midgard_jmp_writeout_op op = word & 0x7;
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ctx->midg_stats.instruction_count++;
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switch (op) {
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case midgard_jmp_writeout_op_branch_uncond: {
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@@ -1121,7 +1109,6 @@ print_extended_branch_writeout_field(disassemble_context *ctx, FILE *fp, uint8_t
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ctx->midg_tags[I] = br.dest_tag;
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ctx->midg_stats.instruction_count++;
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return br.offset >= 0;
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}
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@@ -1328,13 +1315,6 @@ midgard_print_sint(FILE *fp, int n)
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fprintf(fp, " - 0x%X", -n);
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}
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static void
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update_stats(signed *stat, unsigned address)
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{
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if (*stat >= 0)
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*stat = MAX2(*stat, address + 1);
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}
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static void
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print_load_store_instr(disassemble_context *ctx, FILE *fp, uint64_t data, bool verbose)
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{
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@@ -1513,30 +1493,8 @@ print_load_store_instr(disassemble_context *ctx, FILE *fp, uint64_t data, bool v
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/* Debugging stuff */
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if (is_op_varying(word->op)) {
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/* Do some analysis: check if direct access */
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if (word->index_reg == 0x7 && ctx->midg_stats.varying_count >= 0)
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update_stats(&ctx->midg_stats.varying_count,
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UNPACK_LDST_ATTRIB_OFS(word->signed_offset));
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else
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ctx->midg_stats.varying_count = -16;
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} else if (is_op_attribute(word->op)) {
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if (word->index_reg == 0x7 && ctx->midg_stats.attribute_count >= 0)
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update_stats(&ctx->midg_stats.attribute_count,
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UNPACK_LDST_ATTRIB_OFS(word->signed_offset));
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else
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ctx->midg_stats.attribute_count = -16;
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}
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if (!OP_IS_STORE(word->op))
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update_dest(ctx, word->reg);
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if (OP_IS_UBO_READ(word->op))
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update_stats(&ctx->midg_stats.uniform_buffer_count,
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UNPACK_LDST_UBO_OFS(word->signed_offset));
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ctx->midg_stats.instruction_count++;
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}
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static void
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@@ -1712,7 +1670,6 @@ print_texture_word(disassemble_context *ctx, FILE *fp, uint32_t *word,
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unsigned tabs, unsigned in_reg_base, unsigned out_reg_base)
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{
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midgard_texture_word *texture = (midgard_texture_word *) word;
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ctx->midg_stats.helper_invocations |= midgard_op_has_helpers(texture->op);
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validate_sampler_type(texture->op, texture->sampler_type);
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/* Broad category of texture operation in question */
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@@ -1761,12 +1718,8 @@ print_texture_word(disassemble_context *ctx, FILE *fp, uint32_t *word,
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fprintf(fp, "texture[");
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print_texture_reg_select(fp, texture->texture_handle, in_reg_base);
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fprintf(fp, "], ");
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/* Indirect, tut tut */
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ctx->midg_stats.texture_count = -16;
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} else {
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fprintf(fp, "texture%u, ", texture->texture_handle);
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update_stats(&ctx->midg_stats.texture_count, texture->texture_handle);
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}
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/* Print the type, GL style */
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@@ -1776,11 +1729,8 @@ print_texture_word(disassemble_context *ctx, FILE *fp, uint32_t *word,
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fprintf(fp, "[");
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print_texture_reg_select(fp, texture->sampler_handle, in_reg_base);
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fprintf(fp, "]");
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ctx->midg_stats.sampler_count = -16;
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} else {
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fprintf(fp, "%u", texture->sampler_handle);
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update_stats(&ctx->midg_stats.sampler_count, texture->sampler_handle);
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}
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print_vec_swizzle(fp, texture->swizzle, midgard_src_passthrough, midgard_reg_mode_32, 0xFF);
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@@ -1882,11 +1832,9 @@ print_texture_word(disassemble_context *ctx, FILE *fp, uint32_t *word,
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fprintf(fp, "// unknown4 = 0x%x\n", texture->unknown4);
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fprintf(fp, "// unknown8 = 0x%x\n", texture->unknown8);
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}
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ctx->midg_stats.instruction_count++;
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}
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struct midgard_disasm_stats
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void
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disassemble_midgard(FILE *fp, uint8_t *code, size_t size, unsigned gpu_id, bool verbose)
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{
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uint32_t *words = (uint32_t *) code;
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@@ -1901,7 +1849,6 @@ disassemble_midgard(FILE *fp, uint8_t *code, size_t size, unsigned gpu_id, bool
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disassemble_context ctx = {
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.midg_tags = calloc(sizeof(ctx.midg_tags[0]), num_words),
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.midg_stats = {0},
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.midg_ever_written = 0,
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};
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@@ -1990,12 +1937,6 @@ disassemble_midgard(FILE *fp, uint8_t *code, size_t size, unsigned gpu_id, bool
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break;
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}
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/* We are parsing per bundle anyway. Add before we start
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* breaking out so we don't miss the final bundle. */
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ctx.midg_stats.bundle_count++;
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ctx.midg_stats.quadword_count += num_quad_words;
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/* Include a synthetic "break" instruction at the end of the
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* bundle to signify that if, absent a branch, the shader
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* execution will stop here. Stop disassembly at such a break
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@@ -2021,12 +1962,4 @@ disassemble_midgard(FILE *fp, uint8_t *code, size_t size, unsigned gpu_id, bool
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}
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free(ctx.midg_tags);
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/* We computed work_count as max_work_registers, so add one to get the
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* count. If no work registers are written, you still have one work
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* reported, which is exactly what the hardware expects */
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ctx.midg_stats.work_count++;
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return ctx.midg_stats;
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}
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@@ -1,26 +1,4 @@
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#include <stddef.h>
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struct midgard_disasm_stats {
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/* Counts gleaned from disassembly, or negative if the field cannot be
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* inferred, for instance due to indirect access. If negative, the abs
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* is the upper limit for the count. */
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signed texture_count;
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signed sampler_count;
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signed attribute_count;
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signed varying_count;
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signed uniform_count;
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signed uniform_buffer_count;
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signed work_count;
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/* These are pseudometrics for shader-db */
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unsigned instruction_count;
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unsigned bundle_count;
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unsigned quadword_count;
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/* Should we enable helper invocations? */
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bool helper_invocations;
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};
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struct midgard_disasm_stats
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void
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disassemble_midgard(FILE *fp, uint8_t *code, size_t size, unsigned gpu_id, bool verbose);
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