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Emma Anholt 4300853edc freedreno: Flush the shadowed resource's write batch up front. 
This simplifies my mental model of the swapping/blit process for resource
shadowing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11544>
 2021-06-30 21:39:11 +00:00
Emma Anholt 88161ced8d freedreno: Swap needs_ubwc_clear when shadowing. 
The destination of the upcoming blit (the old rsc struct that houses the
fresh BO) wouldn't have its ubwc cleared first, which if it got
unfortunate data in a recycled BO could lead to blit failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11544>
 2021-06-30 21:39:11 +00:00
Emma Anholt ed1f1dea28 freedreno: Stop manually marking blit dst buffers as valid. 
fd_batch_resource_write() does this already.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11544>
 2021-06-30 21:39:11 +00:00
Emma Anholt 514aa01853 freedreno/a5xx: Make sure to mark blit read/write access in the BC. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11544>
 2021-06-30 21:39:11 +00:00
Emma Anholt f413b30ad4 freedreno: swap ->valid when shadowing resources. 
The valid flag indicates whether the bo has had any data written to it.
Failure to swap it meant that if for some reason we fell back to SW
mappings during the blit from shadow, the PIPE_MAP_READ staging blit would
get dropped.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11544>
 2021-06-30 21:39:11 +00:00
Emma Anholt 172082f235 freedreno: Update comments about PIPE_BUFFER shadowing. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11544>
 2021-06-30 21:39:11 +00:00
Eric Engestrom 90071dc47c docs/release-calendar: add a few more 21.1 releases 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11660>
 2021-06-30 19:44:28 +01:00
Eric Engestrom 830ff5a697 docs: update calendar and link releases notes for 21.1.4 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11660>
 2021-06-30 19:38:19 +01:00
Eric Engestrom f37e482013 docs: add release notes for 21.1.4 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11660>
 2021-06-30 19:38:00 +01:00
Rhys Perry c094765a01 aco: remove resource flags 
After disabling SMEM stores, nir_opt_access() now does the same analysis
and we don't need this anymore. Doing it in isel is also too late if we
want to lower descriptor loads in NIR.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11652>
 2021-06-30 19:07:12 +01:00
Emma Anholt fcc41b0631 i915g: Set up the cube map texture wrap modes. 
There are HW limits on what you're allowed to do.  No change on dEQP, but
one less thing for me to worry about with our busted cubes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11648>
 2021-06-30 17:42:56 +00:00
Emma Anholt 25ce136d23 i915g: Add curly braces for normal mesa style (and helps clang-format) 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11648>
 2021-06-30 17:42:56 +00:00
Emma Anholt afe627ea70 i915g: Delete redundant i915_hw_sampler_views atom. 
The i915_hw_samplers atom already updated both samplers and maps, since
both samplers and maps depend on parts of both the gallium sampler state
and the sampler view.  Just move the samplers+views atom down to the
bottom of the file for legibility, and delete the views-only one.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11648>
 2021-06-30 17:42:56 +00:00
Emma Anholt 7e75b1ca49 i915g: Fix FS debug dumping for declarations. 
Samplers have a type, and non-samplers have a destination writemask.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11648>
 2021-06-30 17:42:56 +00:00
Emma Anholt 99fccbee48 i915g: Add the nice cube map layout comments from i915c. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11648>
 2021-06-30 17:42:56 +00:00
Emma Anholt 33e9143faf i915g: Finish the uint -> uint32_t conversion. 
My sed job missed a few.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11648>
 2021-06-30 17:42:56 +00:00
Rob Clark 525be27326 freedreno/a6xx: Fix framebuffer_barrier crash 
This is emitting cmdstream, it should take the submit lock to (a) ensure
we actually have a batch, and (b) prevent it from being flushed from
under it.  This was overlooked in the conversion.

Fixes: 02298ed1fc ("freedreno: Add submit lock")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11658>
 2021-06-30 17:17:39 +00:00
Roman Stratiienko f85d3113b2 egl: android: add IMapper@4 metadata API buffer_info getter 
Starting from Android-11 Google introduces generalized API
to access buffer information. This API is a part of IMapper@4 HAL.

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6045>
 2021-06-30 16:50:44 +00:00
Roman Stratiienko 5d3e64f105 egl: android: prepare code for adding more buffer_info getters 
Instead of calling droid_create_image_ for every gralloc implementation,
create struct buffer_info which contains all required field for invoking
createImageFromDmaBufs2() and let the getters to fill this structure.
Since createImageFromDmaBufs2() is called now only once, the code looks
cleaner and more robust.

Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6045>
 2021-06-30 16:50:44 +00:00
Yevhenii Kolesnikov 974c58b317 intel: fix leaking memory on shader creation 
ralloc_adopt takes care of all the shader's children, but shader itsel ends up
orphaned and never gets free'd.

Fixes: ef5bce9253 ("intel: Drop the last uses of a mem_ctx in nir_builder_init_simple_shader().")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4951

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11651>
 2021-06-30 19:34:56 +03:00
Jason Ekstrand f5876dfdb9 intel/fs: Lower uniform pull constant load message to LSC dataport 
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge 6362059b6b intel/fs: Lower varying pull constant load message to LSC dataport 
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge 4fca64ad4d intel/fs: Lower A64 atomic messages to LSC dataport 
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge 07a4bdf1e8 intel/fs: Lower A64 byte scattered r/w messages to LSC dataport 
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Mark Janes 22d20dbb02 intel/fs: Lower A64 untyped r/w messages to LSC when available 
We set the ex_desc to 0, since the address surface type is FLAT.

v2 (Sagar Ghuge):
 - Fix message descriptor encoding

v2 (Jason Ekstrand):
 - Drop support for block messages

Co-authored-by: Sagar Ghuge <sagar.ghuge@intel.com>
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge 621cf9b1df intel/fs: Lower Byte scattered r/w messages to LSC when available 
v2 (Jason Ekstrand):
 - Squash in brw_scheduler changes
 - Update brw_ir_performance

Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge 8f82c8aa1a intel/fs: Lower untyped float atomic messages to LSC when available 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Mark Janes bd40a1e8c9 intel/fs: Lower untyped atomic messages to LSC when available 
Bspec programming note metions that "Atomic messages are always forced
to "un-cacheable" in the L1 cache". We can make the L1 cache
un-cacheable and L3 with write-back policy.

v2: (Sagar Ghuge):
 - Fix caching policy for atomic messages
 - Fix simd exec size

v3: (Sagar Ghuge):
 - Add atomic messages to brw_schedule_instructions

v4: (Jason Ekstrand):
 - Rebase on lsc_msg_desc reworks

Co-authored-by: Sagar Ghuge <sagar.ghuge@intel.com>
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Mark Janes 4f86a70599 intel/fs: Lower DW untyped r/w messages to LSC when available 
This puts the basic infrastructure in place for lowering logical
dataport messages to LSC messages.  We start with the two most obvious
opcodes and add more in later patches.

v2 (Sagar Ghuge):
 - Pass required params to message desc
 - Remove duplicate mlen calculation
 - Change commit message.

v3 (Jason Ekstrand):
 - Drop TGM support

Co-authored-by: Jason Ekstrand <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Mark Janes 32ec0662fd intel/compiler: Add LSC messages to brw_schedule_instructions 
v2 (Jason Ekstrand):
 - Use lsc_msg_desc_opcode()
 - Drop all opcodes for now and add them in later patches.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Jason Ekstrand 8d3468ad5b intel/compiler: Add LSC to messages brw_ir_performance 
This adds framework only.  No opcodes.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge 634925694d intel/disasm: Disassemble LSC message extended descriptors 
v2 (Mark Janes):
 - changed to lsc convention

v3 (Jason Ekstrand):
 - Use lsc_msg_desc_addr_type

Co-authored-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge 2605727a80 intel/disasm: Disassmeble LSC messages 
v2 (Jordan Justen):
 - Use PRIu64

v3 (Jason Ekstrand):
 - Drop ranged fence ops, Jason

v4: (Mark Janes)
 - fixed missing parameter to brw_message_desc_cmask_or_vector
 - changed to use lsc methods to extract fields

v5 (Jason Ekstrand):
 - Squash original disassembler patch and fixes togetherk
 - Use lsc_opcode_has_cmask
 - Prefix atomic ops with "atomic_"

Co-authored-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Mark Janes f5541cd4e9 intel/compiler: Add getter helpers for LSC message descriptor fields 
v2: (Sagar Ghuge):
 - rename addr_reg_size to src0_len to match with bspec

v3 (Jason Ekstrand):
 - Re-arrange things in increasing bit order

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge 4ff00194b7 intel/compiler: Add helpers for LSC message descriptors 
v2 (Jason Ekstrand):
 - Squash all the similar patches together
 - Re-arrange and rename some things to be more consistent
 - Add a lsc_opcode_has_cmask helper
 - Drop is_one_addr_reg

v3 (Jason Ekstrand):
 - Add transpose
 - Re-order arguments to make more logical sense
 - Switch from `write` to `has_dest`

Co-authored-by: Mark Janes <mark.a.janes@intel.com>
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge b67f1ff465 intel/compiler: Add support for LSC fence operations 
v2 (Jason Ekstrand):
 - Squash SLM and global fence ops together

v3 (Jason Ekstrand):
 - Rework to use message descriptors instead of instruction fields

v4 (Jason Ekstrand):
 - Don't pass BTI into back-end emit function.  Always use FLAT.

Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Sagar Ghuge cf612e4dc1 intel/compiler: Define new LSC data port encodings 
Xe-HPG comes with a massively reworked dataport.  The new thing, called
Load/Store Cache or LSC, has a significantly improved interface.
Instead of bespoke messages for every case, there's basically one or two
messages with different bits to control things like address size, how
much data is read/written, etc.  It's way nicer but also means we get to
rewrite all our dataport encoding/decoding code.  This patch kicks off
the party with all of the new enums.

v2 (Jason Ekstrand, Mark Janes):
 - Rename to LSC

v3 (Jason Ekstrand):
 - Add numbers to all enums

Co-authored-by: Mark Janes <mark.a.janes@intel.com>
Co-authored-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
Jason Ekstrand 4a85a5e09f intel/devinfo: Add a has_lsc bit 
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11600>
 2021-06-30 16:17:18 +00:00
SureshGuttula 52602452ab radeon/vcn: calc_dpb_size should be based on dpb_type 
This patch will fix the dpb size calculated for each dpb_type.
Current implementaion always calculating based on DPB_MAX_RES.To fix
this dpb_type should be decided before calc_dpb_size.

Signed-off-by: SureshGuttula <suresh.guttula@amd.corp-partner.google.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11633>
 2021-06-30 14:22:37 +00:00
Mike Blumenkrantz c0397a42ce radv: pre-calc vertex buffer descriptor size on pipeline object 
util_bitcount has a nonzero cost, and calling it like this in a hotpath
generates unnecessary overhead

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11525>
 2021-06-30 13:42:42 +00:00
Mike Blumenkrantz 936c21d376 zink: attempt to handle some resource unmap cases in 32bit envs 
address space is limited here, so in some cases it's worthwhile to
unmap resources

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
 2021-06-30 13:07:57 +00:00
Mike Blumenkrantz 9d599ed417 zink: cache visible vram 
yolo

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
 2021-06-30 13:07:57 +00:00
Mike Blumenkrantz d4a7b4fef8 zink: uncap mem caching 
if it fits, it sits

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
 2021-06-30 13:07:57 +00:00
Mike Blumenkrantz 778f325c67 zink: make mem cache limits dynamically scalable 
this removes the hardcoded count of 5 mem blocks to cache and replaces
it with a value that's based on the number of allocations seen

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
 2021-06-30 13:07:57 +00:00
Mike Blumenkrantz 252afe405f zink: don't align device-local buffer memory 
this can't be mapped

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
 2021-06-30 13:07:57 +00:00
Mike Blumenkrantz 93e8494007 zink: try for better buffer allocation heaps 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11594>
 2021-06-30 13:07:57 +00:00
Gert Wollny 34cb401791 r600/sfn: initialize all texture lower options 
Fixes: d1edf3cdf2
    r600/sfn: Lower offset in TXF instructions

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11650>
 2021-06-30 09:12:47 +00:00
Marcin Ślusarz 7048a15485 anv: drop unused argument of anv_descriptor_set_address 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11577>
 2021-06-30 08:41:41 +00:00
Marcin Ślusarz 904bd8f358 anv: handle push descriptor sets when they are sent with push constants 
When vkCmdPushDescriptorSetKHR is used, the descriptor set is allocated
internally without belonging to any pool. Such descriptor set will be
visible on the GPU side because it's a part of the dynamic state stream,
but we still have to store its address in the array of descriptor sets.

Complements: 379b9bb7b0 ("anv: Support fetching descriptor addresses from push constants")

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11577>
 2021-06-30 08:41:41 +00:00
Marcin Ślusarz 79a50c6f54 anv: keep descriptor set's address directly in anv_descriptor_set 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11577>
 2021-06-30 08:41:41 +00:00