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Author SHA1 Message Date
Sil Vilerino f7bd375e39 frontend/va: Add VAProfileH264High10 
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22539>
 2023-04-17 22:26:20 +00:00
Sil Vilerino 407bd51b71 d3d12: Support PIPE_VIDEO_CAP_ENC_QUALITY_LEVEL 
Only return we support 1 quality level. The point of returning this
cap is that vlVaEndPicture will check for it and otherwise overwrite
some rate control parameters with defaults

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
 2023-04-17 21:58:35 +00:00
Sil Vilerino 99f96eb81b d3d12: Support PIPE_VIDEO_CAP_MIN_WIDTH/HEIGHT caps 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
 2023-04-17 21:58:35 +00:00
Sil Vilerino 956c582d04 d3d12: Support QPMin/QPMax app params 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
 2023-04-17 21:58:35 +00:00
Sil Vilerino b40aacc0c2 d3d12: Support rate control HRD and MaxFrameSize app params 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
 2023-04-17 21:58:35 +00:00
Sil Vilerino 358fea01a6 d3d12: Support QVBR rate control mode 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
 2023-04-17 21:58:35 +00:00
Sil Vilerino 9c4969a249 frontend/va: Allow distinction for Min/MaxQP params sent from app and frontend defaults 
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
 2023-04-17 21:58:35 +00:00
Sil Vilerino 44c53786a0 frontend/va: Allow distinction for HRD params sent from app and frontend defaults 
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
 2023-04-17 21:58:35 +00:00
Sil Vilerino 30a6363c8f frontend/va: Support QVBR rate control mode 
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22530>
 2023-04-17 21:58:35 +00:00
Patrick Lerda 035b84f308 lima: fix refcnt imbalance related to framebuffer 
Indeed, the current framebuffer hardcoded cleanup
is not sufficient.

For instance, this issue is triggered with:
"piglit/bin/fbo-depthstencil clear default_fb -samples=2 -auto"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

cc: mesa-stable

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22234>
 2023-04-17 21:44:15 +00:00
José Roberto de Souza 3c47627871 build: Add Iris and ANV to ARM's auto-generated drivers 
Xe KMD supports ARM CPUs, so we are now able to have Intel discrete
GPUs with ARM CPUs working.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
 2023-04-17 20:08:34 +00:00
José Roberto de Souza a5c57b9af7 iris: Fix vm bind of imported bos from other GPUs 
The imported buffer may be created in a device with different
memory alignment and this can cause vm bind to fail because bo
size is smaller than vm bind range aligned.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
 2023-04-17 20:08:34 +00:00
José Roberto de Souza 41f1e6c84b iris: Implement batch_submit() in Xe kmd backend 
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22476>
 2023-04-17 20:08:34 +00:00
Nanley Chery b2d7386631 iris/bufmgr: Handle flat_ccs for BO_ALLOC_ZEROED 
We can't map the CCS memory region. So, rely on the kernel's zeroing of
new allocations. This is helpful when creating dmabufs that use
compression.

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
 2023-04-17 19:16:59 +00:00
Nanley Chery 215fbbb604 iris/bufmgr: Add and use zero_bo 
This simplifies the next patch.

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
 2023-04-17 19:16:59 +00:00
Nanley Chery 5e5faa1194 iris: Allocate ZEROED BOs for shared resources 
A port of cbee2d1102 ("i965/screen: Allocate ZEROED BOs for images").

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22487>
 2023-04-17 19:16:59 +00:00
Erico Nunes be2619766b lima/ci: temporarily disable deqp-egl tests due to timeouts 
A regression causing these tests to become unstable was introduced while
lima CI was disabled in the last days. It seems to be caused by the
latest kernel bump, but still needs more investigation.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22531>
 2023-04-17 18:01:33 +00:00
Sil Vilerino d0d6d90ccf d3d12: Do not fail d3d12_screen creation if D3D12_FEATURE_D3D12_OPTIONS14 not available 
Fixes: 52ee566bc5 ("d3d12: Query device for D3D12_FEATURE_D3D12_OPTIONS14")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22534>
 2023-04-17 15:44:46 +00:00
Leo Liu ec896048bb radeonsi: create a new context for transcode with multiple video engines 
For CHIP_GFX1100, there are 2 VCN instances but using unified queue i.e.
decode and encode will go to HW via same ring type. With AMDGPU kernel
scheduler, since the trancode is sharing the same pipe context, so that
the gpu scheduler assign the decode and encode into the same VCN engine.
In order to use both engines with transcode case, the new pipe context will
be created when the case being detected, with that the transcode can be
load balanced with multiple VCN engines.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22471>
 2023-04-17 15:10:01 +00:00
José Roberto de Souza 1563210a41 intel/common: Add gt_id to intel_engine_class 
MTL and newer platforms on Xe kmd will have engines with gt_id != 0.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22477>
 2023-04-17 14:43:06 +00:00
José Roberto de Souza 670d4a2f71 iris: Fix close of exported bos 
On commit 910e659e31 ("iris: Add function to close gem bos") I used
iris_bo_close() to close exported bos with the wrong drm_fd.
Causing piglit ext_image_dma_buf_import.ext_image_dma_buf_import*
tests to crash during tear-down.

So here adding iris_bufmgr_bo_close() that will close bos that belongs
to bufmgr->fd and changing the parameters of iris_bo_close() to close
the bo of given fd.

Fixes: 910e659e31 ("iris: Add function to close gem bos")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8836
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22501>
 2023-04-17 14:02:53 +00:00
Lionel Landwerlin b30a75a195 vulkan/overlay: deal with unknown pNext structures 
To implement some of the features of the layer, we need to enable some
of the feature bits at device/command_buffer creation. To do so, we
need to edit some of the structures coming from the application. Most
of those are const so we need to clone them before edition.

This change disables some of the layer features if we run into a
situation where one of the structure we need to clone is unknown such
that we can't make a copy of it (since we don't know its size).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7677
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19897>
 2023-04-17 15:41:58 +03:00
Erico Nunes 1eb2359bbd lima: fix stringop-overflow warning 
New versions of gcc output a warning about this code, apparently
because of the mix of signed and unsigned operations in the loop
condition. Rework the types to fix the warning.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22129>
 2023-04-17 10:15:25 +00:00
Patrick Lerda 4f42d3b843 r600: fix refcnt imbalance related to evergreen_set_shader_images() 
Indeed, the reference was overwritten.

For instance, this issue is triggered with:
"piglit/bin/shader_runner tests/spec/arb_shader_image_load_store/execution/write-to-rendered-image.shader_test -auto -fbo"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: a6b3792843 ("r600: add core pieces of image support.")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22394>
 2023-04-17 10:01:03 +00:00
Andres Calderon Jaramillo 4405e8a9e1 r600: Report multi-plane formats as unsupported 
This is the analogous of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9490 but for
r600.

Discoloration of NV12 video frames was observed in Chrome/ChromeOS and
the problem was tracked down to the fact that Mesa was following the
PIPE_FORMAT_R8_G8B8_420_UNORM/lower_yuv_external() path. The symptom is
that (for an unknown reason) the YUV-to-RGB conversion is using the
value of Y as the value of Y, U, and V. So, for example, if the input
value is YUV = (50, 120, 130), then what actually gets converted to RGB
is YUV = (50, 50, 50).

Considering that PIPE_FORMAT_R8_G8B8_420_UNORM was introduced for
freedreno
(https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6693) and it
is already being reported as unsupported for radeonsi, it's reasonable
to assume that GPUs targeted by r600 don't support this path either.

Note: I tested this patch with an AMD Palm device which follows the
evergreen_is_format_supported() path. I did not have access to a device
to test the r600_is_format_supported() path.

v2: Changed >= 2 to > 1.

Fixes: 826a10255f ("st/mesa: Add NV12 lowering to PIPE_FORMAT_R8_G8B8_420_UNORM")
Tested-by: Andres Calderon Jaramillo <andrescj@chromium.org>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22511>
 2023-04-17 09:43:14 +00:00
David Redondo eb7e906886 egl/wayland: fix oob buffer access during buffer_fds clean up 
After iterating through the number of planes in the above for
loop i is more than the number of planes which corresponds to
the size of the buffer_fds array.

Fixes: 967b9ad084 ("egl/wayland: for prime, allocate linear_copy from display GPU VRAM")
Signed-off-by: David Redondo <kde@david-redondo.de>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22496>
 2023-04-17 09:02:53 +00:00
Samuel Pitoiset 0d7912d239 radv: disable fast-clears with CMASK for 128-bit formats 
This isn't supported according to RadeonSI.

This fixes a piglit test with Zink that uses a R32G32B32A32_SINT format
with MSAA 8x. This is because DCC fast-clears with MSAA require to
clear CMASK too.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7313
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22462>
 2023-04-17 06:19:34 +00:00
Qiang Yu 134abe8344 radeonsi: remove separate_prolog parameter 
si_get_ps_prolog_key is only called by part mode shader now.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:56 +00:00
Qiang Yu 51d9946448 radeonsi: restructure mono merged shader build 
No function change, just refine to share more code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:56 +00:00
Qiang Yu dcfe3eed80 radeonsi: monolithic ps emit prolog in nir directly 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:56 +00:00
Qiang Yu fbedbad0dd radeonsi: handle lowered ps in scan_io_usage 
si_update_shader_binary_info() will call into this function
to collect memory usage info after shader has been lowered
finally. To avoid assertion failure in nir_instr_as_intrinsic()
we have to check instruction type first.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:56 +00:00
Qiang Yu b8bd186788 radeonsi: add si_nir_emit_polygon_stipple 
Ported from si_llvm_emit_polygon_stipple().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:56 +00:00
Qiang Yu 223878fbe2 radeonsi: add si_nir_lower_ps_color_input 
For lowering legacy color inputs in PS.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:56 +00:00
Qiang Yu cc891e871e ac/llvm,radeonsi: lower ps color load in nir 
Remove the color0/1 in ac_shader_abi which is used by
radeonsi only.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:56 +00:00
Qiang Yu 35d5c7c251 ac/nir/ps: lower sample mask input when needed 
Ported from si_llvm_build_ps_prolog().

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:56 +00:00
Qiang Yu 1103d4ed74 ac/nir/ps: add force lower barycentric load options 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:55 +00:00
Qiang Yu 0e4ac0c1d6 ac/nir/ps: lower barycentric load when bc_optimize 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:55 +00:00
Qiang Yu d6c5596c37 radeonsi: implement nir_load_barycentric_optimize_amd 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:55 +00:00
Qiang Yu 7fcc5aa9c0 nir: add nir_load_barycentric_optimize_amd intrinsic 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21683>
 2023-04-17 02:11:55 +00:00
Mike Blumenkrantz 31a0de9921 zink: make general bo allocation more robust by iterating 
previously there was a fallback path here (broken by f6d3a5755f)
which would attempt to demote BAR allocations to other heaps on failure
to avoid oom

this was great, but it's not the most robust solution, which is to iterate
all the memory types matching the given heap and try them in addition to having
a demotion fallback

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22479>
 2023-04-16 23:55:30 +00:00
Mike Blumenkrantz 9d923b14f9 zink: restore BAR allocation failure demotion 
this restores the fallback used when BAR allocation fails due to oom
by re-selecting memoryTypeIndex after the heap demotion

Fixes: f6d3a5755f ("zink: zink_heap isn't 1-to-1 with memoryTypeIndex")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22479>
 2023-04-16 23:55:30 +00:00
Mike Blumenkrantz 561b64cf55 zink: slightly rework memoryTypeIndex selection to pre-determine heap 
should be no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22479>
 2023-04-16 23:55:30 +00:00
Mike Blumenkrantz 085c9efbf3 zink: move memoryTypeIndex selection down in general bo allocation 
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22479>
 2023-04-16 23:55:30 +00:00
Erico Nunes fdf746cb2b Revert "ci: disable lima farm, currently out-of-space, needs to be fixed" 
This reverts commit 78644c9bb0.

Fixes: 78644c9bb0 ("ci: disable lima farm, currently out-of-space, needs to be fixed")

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22513>
 2023-04-16 23:03:47 +00:00
Eric Engestrom 8ebc5cbe2b v3dv/ci: drop fixed failure from fails.txt 
Fixes: 8976d8280f ("wsi: remove get_sorted_vk_formats duplication")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22514>
 2023-04-16 20:49:05 +01:00
David Heidelberg 74525f8576 ci: uninstall libdrm from the GL and VK containers 
Occasionally causing troubles on -valve jobs.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
 2023-04-16 17:28:52 +00:00
David Heidelberg 74e4235916 ci: polish deqp-runner a bit 
Plus cosmetics adjustments to pass more of shellcheck.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
 2023-04-16 17:28:52 +00:00
David Heidelberg 2933976e78 ci/freedreno: fix the a530_piglit job and switch to Weston 
If we count devices which running a530 with mainline kernel and Mesa,
it's probably mostly phones and tablets running on Wayland. Adapt to it.

Fixes: 83c2b26acf ("ci/freedreno: Switch the piglit job to using a deqp-runner suite.")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
 2023-04-16 17:28:52 +00:00
David Heidelberg f84aee451d ci/freedreno: update a530 flakes, fails and skips 
Add multiple skips for the:
 - KHR-GLES31.core.pixelstoragemodes.teximage2d
 - KHR-GLES31.core.pixelstoragemodes.teximage3d

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8837

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
 2023-04-16 17:28:52 +00:00
David Heidelberg 2092f95975 ci/freedreno: a530 behaves stable in 6.3 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
 2023-04-16 17:28:52 +00:00