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Author SHA1 Message Date
Brian Paul 341babb8a7 llvmpipe: asst. clean-ups in lp_state_fs.c 
Move var decls to first use.  Add const qualifiers, comments, etc.

Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>
 2022-10-27 16:10:47 +00:00
Brian Paul 4f4aacad19 llvmpipe: fix comment typo 
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>
 2022-10-27 16:10:47 +00:00
Brian Paul c2cd0e8218 llvmpipe: s/uint/enum pipe_prim_type/ in lp_setup_context.h 
Signed-off-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19330>
 2022-10-27 16:10:47 +00:00
Marcin Ślusarz ea7e331fb8 anv: add mesh shading tracepoints 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>
 2022-10-27 15:03:28 +00:00
Marcin Ślusarz 63ad8aed41 intel/ds: add new category/stage for draw mesh events 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>
 2022-10-27 15:03:28 +00:00
Marcin Ślusarz 2bc82581ad anv: add support for mesh shading in INTEL_MEASURE 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19344>
 2022-10-27 15:03:28 +00:00
Mike Blumenkrantz b1b2dee30e zink: add docs for zink_surface 
zink_surface is an abstraction that is a superset of pipe_surface,
used for all types of images

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
 2022-10-27 14:43:50 +00:00
Mike Blumenkrantz 1e63b24f88 zink: add some breadcrumbs for VK_EXT_multisampled_render_to_single_sampled 
at some point someone should hook this extension up to simplify/optimize
the existing msrtt handling

see also #7559

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
 2022-10-27 14:43:50 +00:00
Mike Blumenkrantz 919cbc190d zink: delete unused zink_surface member 
I think this was used before imageless_framebuffer became a requirement?

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
 2022-10-27 14:43:50 +00:00
Mike Blumenkrantz 81713956fe zink: use zink_resource_object::views to defer deferred storage view deletion 
this is basically the same thing, so reuse the existing mechanism

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
 2022-10-27 14:43:50 +00:00
Mike Blumenkrantz 113e477865 zink: simplify conditional for surface rebind no-ops 
the question isn't whether the storage imageview has been created,
it's whether the surface is current for the memory binding

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
 2022-10-27 14:43:50 +00:00
Mike Blumenkrantz 52efe113f9 zink: delete stale comment for zink_surface 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
 2022-10-27 14:43:50 +00:00
Mike Blumenkrantz 34ec611dc6 zink: simplify swapchain imageview handling 
the zink_resource_object::views array already handles this, so don't
duplicate its functionality

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19307>
 2022-10-27 14:43:50 +00:00
Lucas Stach 2f7a2ffde8 etnaviv: disable PE_COLOR_FORMAT_OVERWRITE with MSAA 
This breaks MSAA, even when compression is not activated. The issue is
mostly theoretical, as we always enable color compression with MSAA, but
I ran into some GPU hangs when I disabled compression to run some tests.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach 1cdcf45ac8 etnaviv: set LOGIC_OP_UNK24 for MSAA rendering on SMALL_MSAA GPUs 
Fixes MSAA corruptions on GC3000. 0x4 seems to be enough to fix the
misrendering, but blob seems to always emit 0x5.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach 2b11838eff etnaviv: properly size TS buffer for MSAA resources 
On GPUs with the SMALL_MSAA feature, color tiles of the MSAA resource
are 256B, even if the GPU doesn't have the CACHE128B256BPERLINE feature.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach ca96b3a409 etnaviv: rs: try to find exact format match first 
For MSAA downsampling to work correctly, the RS engine needs to know
the exact format of the blit source/target. The compatible formats are
fine as long as the RS is only used as a tiler without doing any
conversion.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach 0ff96aaef3 etnaviv: rs: fix MSAA alignment adjustment 
The RS window alignment restrictions apply to the downsampled side of the
blit, so we must increase the blit size alignment by the MSAA scale to
avoid RS hangs. If a multi-pipe resolve is used (when the GPU doesn't have
the singlebuffer feature) then the Y alignment needs to be increased by
the number of pixel pipes.

The resource allocation has already been fixed to take this additional
alignment requirement into account.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach 6dfae66016 etnaviv: increase alignment for MSAA resources 
The RS window aligment restrictions apply to the downsampled size of a
MSAA resource, so in order to be able to do the downsample blit for all
possible sizes, we must make sure to increase the alignment of the
multisampled resource by the MSAA scale.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach 391ccff250 etnaviv: handle compressed texture formats in etna_layout_multiple 
Instead of special casing compressed formats in the caller, handle
them properly when working out the resource alignment. For good measure
add an assert that the layout is linear, as expected.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach 88d8775f9e etnaviv: compute linear resource Y alignment in etna_layout_multiple 
Instead of adjusting the Y alignment in the callers, just do the
right (and consistent) thing in etna_layout_multiple.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach 7d38c7cc18 etnaviv: assert valid layout in etna_layout_multiple 
This function assigns proper values to the padding and halign parameters
for all valid layouts. Using unreachable() in the default path of the
switch statement asserts that we got a valid layout, so we can get rid of
some superfluous variable initializations and asserts in the call sites.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Lucas Stach 735718ed33 etnaviv: move etna_layout_multiple into etnaviv_resource.c 
The call sites of this function make a number of adjustments to the
padding/alignment returned by this function, which are inconsistent
and still don't cover all necessary cases. To be able to extend this
function move it out of the header and make the parameters passed
more useful by providing all necessary information at once.

No functional change, just a preparation for the following changes.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
 2022-10-27 14:33:15 +00:00
Rhys Perry 93fb84237f ac/nir: add ac_nir_lower_ngg_options 
These signatures were getting ridiculous.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19340>
 2022-10-27 13:31:40 +00:00
Rhys Perry 21a319851a ac/nir: micro-optimize boolean expression 
Ignoring SCC spilling, the old version is probably faster because this
mixes uniform and divergent booleans.

fossil-db (navi21):
Totals from 61167 (45.10% of 135636) affected shaders:
Instrs: 29961899 -> 29932551 (-0.10%)
CodeSize: 157407028 -> 157289636 (-0.07%)
Latency: 139671953 -> 139625186 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 21221097 -> 21220756 (-0.00%)
SClause: 750438 -> 750439 (+0.00%)
Copies: 2672846 -> 2582332 (-3.39%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19340>
 2022-10-27 13:31:40 +00:00
Martin Roukala (né Peres) 03a6eb2547 zink: mark a test as a flake in RADV expectations 
Having only-recently hooked monitoring up for zink-on-radv, I am
starting to capture some flakes. So, I am unsure about the reproduction
rate of this failure, but I can say it is not extremely common.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19335>
 2022-10-27 13:08:07 +00:00
Iago Toral Quiroga 07c7d846e5 v3dv: drop layout refs for all allocated sets from a pool on destroy / reset 
In 7f6ecb8667 we added reference counting for descriptor set layouts,
however, we didn't realize that pools created without the flag
VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT don't free individual
descriptors and can only be reset or destroyed. Since we only drop
references when individual descriptor sets were destroyed, we would
leak set layouts referenced from descriptor sets allocated from these
pools.

Fix that by keeping a list of all allocated descriptor sets (no matter
whether VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT is present or
not) and then traversing the list dropping the references on pool resets
and destroys.

Fixes: 7f6ecb8667 ('v3dv: add reference counting for descriptor set layouts')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19337>
 2022-10-27 11:35:29 +00:00
Lionel Landwerlin 57a1d13279 iris: enable protected contexts 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin 13d75495a0 iris: Emit protection & session ID on protected command buffers 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin 9402ac8023 iris: handle protected BO creation 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin 5d88ab63e2 st/gallium: plumb protected context creation 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin 9de1263842 egl: Add EGL_EXT_protected_content support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin b30f1327f9 gallium: rename PROTECTED_CONTENT cap into PROTECTED_SURFACE 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin 62ac2cec85 dri: rename PROTECTED_CONTENT in PROTECTED_SURFACE 
Better suiting to the associated extension EXT_protected_surface.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin ed7d64962e intel/common: add detection of protected context support 
v2: Add anv bits
    Fix missing i915 extension chaining helper

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin 4172596382 isl: add new MOCS field for protected buffers 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin 8cd8f3d697 drm-uapi: bump headers 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
David Heidelberg b16df310fd ci/zink: rename zink job to zink-lvp to better describe it 
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19321>
 2022-10-27 10:32:07 +00:00
Daniel Schürmann c80137fcba radv/rt: overwrite hit args with undef in case of a miss 
This helps some variable coalescing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19188>
 2022-10-27 09:45:39 +00:00
Daniel Schürmann f4270b7659 radv/rt: create traversal shader independent from main shader 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19188>
 2022-10-27 09:45:39 +00:00
Daniel Schürmann 22534e0d1a nir: add AMD RT traversal intrinsics 
These I/O intrinsics help to create an enclosed traversal shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19188>
 2022-10-27 09:45:39 +00:00
Jordan Justen c238699afa intel/compiler: Broadcast lower code should check 64-bit int support 
This will affect MTL which will have fp64 support without int64
support.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19284>
 2022-10-27 09:22:09 +00:00
Lionel Landwerlin 2da7ec0db9 intel/clc: assert when libclc shader is not found 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7483
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19091>
 2022-10-27 08:53:55 +00:00
Iago Toral Quiroga 24d9a80247 v3dv: implement VK_EXT_pipeline_robustness 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18883>
 2022-10-27 08:17:11 +00:00
Iago Toral Quiroga 9deef4cde6 vulkan/runtime: include robustness info when hashing a shader stage 
Suggested by Jason Ekstrand.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18883>
 2022-10-27 08:17:11 +00:00
Iago Toral Quiroga c3641f413a broadcom/compiler: trivial code clean-up 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18883>
 2022-10-27 08:17:11 +00:00
Iago Toral Quiroga 86503aaba4 v3dv: use enabled features from vk_device 
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18883>
 2022-10-27 08:17:11 +00:00
Iago Toral Quiroga 1a2ca58aed v3dv: use NIR_PASS with v3d_nir_lower_robust_image_access 
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18883>
 2022-10-27 08:17:11 +00:00
Qiang Yu bfb6a5fef1 ac/nir/ngg: add one odd dword to nogs culling pervertex lds 
radeonsi use like this.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18832>
 2022-10-27 07:35:01 +00:00
Qiang Yu 13fb7f8f2c ac/nir/ngg,ac/llvm,aco: save nogs ngg culling one lds dword 
TES rel patch id is <256, so we can use an existing unused LDS
byte instead of extra dword.

To ease the programing, change the index of repacked_arg_vars
for these variables.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18832>
 2022-10-27 07:35:01 +00:00