Mel Henning
263a82f49b
nir: Add nir_deref_instr_is_arr() helper
...
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38856 >
2025-12-10 22:07:44 +00:00
Michael Cheng
8ba197c9ef
anv: Switch shaders to dedicated VMA allocator
...
Switched to the new VMA allocator that provides explicit GPU VA
control via util_vma_heap.
This is architectural preparation for ray tracing capture/replay,
which requires the ability to reserve and allocate shaders at specific
VAs. The state pool's free-list design makes VA reservation difficult
to add, while the new chunk allocator is designed for explicit VA
management from the ground up.
Signed-off-by: Michael Cheng <michael.cheng@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:10 +00:00
Michael Cheng
1fa327ac32
anv: Add VMA allocator for shader binaries
...
Introduce a VMA-first chunk allocator for shader binaries to eventually
replace the anv_state_pool-based implementation. This allocator works
directly with GPU virtual addresses through util_vma_heap, making the
virtual address space an explicit resource managed by ANV.
No functional change in this commit.
v2(Michael Cheng): Use existing instruction state pool anv_va_range
v3(Lionel): Simplify allocator
Signed-off-by: default avatarMichael Cheng <michael.cheng@intel.com >
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:10 +00:00
Lionel Landwerlin
20f320b7c7
anv: program STATE_BASE_ADDRESS instruction ptr using pdevice address
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:10 +00:00
Lionel Landwerlin
7cc9d8eec7
anv: fixup error path for shader allocation
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:10 +00:00
Lionel Landwerlin
567c1b3af4
anv: add missing device_memory_report for shaders
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: d39e443ef8 ("anv: add infrastructure for common vk_pipeline")
Acked-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:09 +00:00
Lionel Landwerlin
efe60d2940
intel: remove unused show_shader_stage debug option
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Acked-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:09 +00:00
Lionel Landwerlin
37789249a1
anv: fix internal representations of shaders
...
The shader assembly was only available when not hitting the cache.
Additionally the serialized shader code was also the relocated variant
which meant that it could differ from one run to the next. Instead
serialize the unrelocated code produced by the compiler.
With this change we now decode the copy of the ISA we have on the
host.
NIR dumps are only available for shaders not loaded from the cache
(much like the other drivers).
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Fixes: 8f4c2bd566 ("anv: add runtime shader statistic support")
Acked-by: Michael Cheng <michael.cheng@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38869 >
2025-12-10 20:32:08 +00:00
Nanley Chery
fe372f3b1b
anv: Don't allow STORAGE + CCS for Y_TILED mod
...
This can happen as a result of us adding on CCS to modifiers which don't
support it on gfx9-11.
Fixes image corruption seen with the following test:
$ mpv av://lavfi:testsrc --config=no --vo=gpu-next --scale=ewa_lanczossharp --fs
Fixes: 01c4ea771c ("anv: Enable storage accesses with modifiers on gfx12+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12910
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38855 >
2025-12-10 20:09:09 +00:00
Caio Oliveira
7bd238fa5a
brw: Properly set 'desc as register' for SEND in assembler
...
The non-split SEND case was missing setting this.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38876 >
2025-12-10 19:46:52 +00:00
Marek Olšák
308da55f1a
radv,radeonsi: use FRAG_RESULT_DUAL_SRC_BLEND
...
this is slightly nicer
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38604 >
2025-12-10 19:16:46 +00:00
Marek Olšák
9a2f1be814
nir: add FRAG_RESULT_DUAL_SRC_BLEND and an option to use it
...
This is potentially nicer for some drivers. AMD drivers will use it.
mesa_frag_result_get_color_index will be used often.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38604 >
2025-12-10 19:16:46 +00:00
Chia-I Wu
ddd0b0c3a8
panvk: rework calculate_task_axis_and_increment
...
We used to maximize threads_per_task, but that is ideal when the system
has a single gpu client. When there are multiple gpu clients, we want
smaller threads_per_task such that cores can be more fairly shared among
the clients.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com >
Tested-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37988 >
2025-12-10 18:54:48 +00:00
Chia-I Wu
5fd32d79ee
panvk: fix calculate_task_axis_and_increment
...
task_axis selects the dim of the global workgroup, not the dim of the
local workgroup.
v2: fix assert for dEQP-VK.compute.pipeline.basic.empty_workgroup*
Signed-off-by: Chia-I Wu <olvaffe@gmail.com >
Tested-by: Yiwei Zhang <zzyiwei@chromium.org > (v1)
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com > (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37988 >
2025-12-10 18:54:48 +00:00
Chia-I Wu
546d73721b
panvk: set compute_ep_limit on v12+
...
Set compute_ep_limit to max_tasks_per_core on v12+. It is generally a
good idea to queue as many tasks as possible to better utilize the
cores.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com >
Tested-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37988 >
2025-12-10 18:54:48 +00:00
Chia-I Wu
bcd2e62ad0
panfrost: make RUN_COMPUTE.ep_limit configurable
...
Since v12, RUN_COMPUTE.ep_limit specifies the size of the compute task
queue. RUN_COMPUTE stalls when there are more tasks in the queue than
the specified ep_limit.
Sensible values are 0 (treated as 4), 4, or 16 (max_tasks_per_core).
Signed-off-by: Chia-I Wu <olvaffe@gmail.com >
Tested-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37988 >
2025-12-10 18:54:48 +00:00
Yiwei Zhang
c696ec3b73
venus: add missing VKAPI_ATTR/CALL
...
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14446
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38882 >
2025-12-10 18:11:07 +00:00
Aaron Ruby
b17896f693
device-select-layer: Implement VkNegotiateLayerInterface::pfnGetDeviceProcAddr
...
This must be implemented for loaderLayerInterfaceVersion >= 2. The only
interface that's allowed to be set to null is pfnGetPhysicalDeviceProcAddr.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38270 >
2025-12-10 17:36:21 +00:00
Pohsiang (John) Hsu
6173ff73c7
mediafoundation: remove unused templ and small code cleanup
...
Reviewed-by: Yubo Xie <yuboxie@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857 >
2025-12-10 17:13:34 +00:00
Pohsiang (John) Hsu
23516579a8
mediafoundation: remove unneeded memset (~34KB for hevc)
...
Reviewed-by: Yubo Xie <yuboxie@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857 >
2025-12-10 17:13:34 +00:00
Silvio Vilerino
c0039ce657
d3d12: Prefer video encode suballocated buffer mode for subregion notification mode
...
Reviewed-by: Pohsiang (John) Hsu <pohhsu@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857 >
2025-12-10 17:13:33 +00:00
Pohsiang (John) Hsu
d16b651fdd
mediafoundation: add some end of function error logging for diagnosing error
...
Reviewed-by: Yubo Xie <yuboxie@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857 >
2025-12-10 17:13:33 +00:00
Pohsiang (John) Hsu
47dc4b90e4
mediafoundation: propagate PrepareForEncode error up.
...
Reviewed-by: Yubo Xie <yuboxie@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857 >
2025-12-10 17:13:33 +00:00
Pohsiang (John) Hsu
10138e5b42
mediafoundation: turn on slice auto on frames with dirty rect only
...
Reviewed-by: Yubo Xie <yuboxie@microsoft.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38857 >
2025-12-10 17:13:32 +00:00
Yonggang Luo
095c2acf01
meson: do not reconstruct ICD paths
...
This is a follow up of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20907/diffs?commit_id=b6a344f4baa1ee2c784ca74499dc9fe3b4519013
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@google.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38637 >
2025-12-10 14:46:11 +00:00
Yonggang Luo
be4ad5c819
meson: Remove VK_ICD_FILENAMES totally from source tree.
...
This is a follow up of
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28516
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com >
Reviewed-by: Gurchetan Singh <gurchetansingh@google.com >
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com > hk changes
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com > for RADV changes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38637 >
2025-12-10 14:46:11 +00:00
Dylan Baker
938fb7703e
anv/video: Cast intentional read past end of struct member to void*
...
Coverity notices that we read past the end of the array we're pointing
to, which is intentional, we want to copy additional members from the
source struct into the target pointer. As such, cast to a `void *`,
since this will make Coverity happy.
CID: 1649589
Fixes: 314de7af06 ("anv: Initial support for VP9 decoding")
Reviewed-by: Hyunjun Ko <zzoon@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38438 >
2025-12-10 14:18:59 +00:00
Tapani Pälli
c9bc373f7c
crocus: add struct crocus_scissor_state to clamp values to 16bit
...
This is a port of iris driver commit 193e494e6a to crocus.
Fixes: bc1a6b0a41 ("gallium: change pipe_scissor_state to 32 bit integer")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14428
Signed-off-by: Tapani Pälli <tapani.palli@intel.com >
Reviewed-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38862 >
2025-12-10 14:04:56 +00:00
Valentine Burley
c56543874c
zink/ci: Document recent Turnip flakes
...
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867 >
2025-12-10 13:32:08 +00:00
Georg Lehmann
621465e417
nir/opt_uniform_subgroup: handle more trivial shuffles/votes
...
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867 >
2025-12-10 13:32:08 +00:00
Georg Lehmann
e648e551c1
nir/opt_uniform_subgroup: wire up mbcnt_amd path
...
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867 >
2025-12-10 13:32:08 +00:00
Georg Lehmann
5778436e99
nir/opt_uniform_subgroup: use nir_shader_intrinsics_pass
...
Nothing here needs the recursion of the full lower_instructions pass.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867 >
2025-12-10 13:32:08 +00:00
Georg Lehmann
5f28bb72a7
nir/divergence_analysis: fix swizzle_amd without fetch inactive
...
Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867 >
2025-12-10 13:32:08 +00:00
Georg Lehmann
1fc38d8539
nir/opt_uniform_subgroup: fix swizzle_amd without fetch_inactive
...
Fixes: ad5be40303 ("nir: add fetch inactive index to quad_swizzle_amd/masked_swizzle_amd")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867 >
2025-12-10 13:32:08 +00:00
Georg Lehmann
e11d7f06d0
nir/opt_uniform_subgroup: don't try to optimize non trivial clustered reduce
...
Fixes: 535caaf3e0 ("nir: Optimize uniform iadd, fadd, and ixor reduction operations")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38867 >
2025-12-10 13:32:08 +00:00
Valentine Burley
a265cdaa18
ci/deqp: Backport Android logcat commit
...
Instead of manually applying the patch, backport the version that landed
in main, which requires a cmake argument to enable.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38071 >
2025-12-10 11:31:33 +00:00
Valentine Burley
4cbf5062b7
ci: Uprev GL & GLES CTS
...
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38071 >
2025-12-10 11:31:33 +00:00
Valentine Burley
a65a7dbac9
ci: Uprev VKCTS
...
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38071 >
2025-12-10 11:31:31 +00:00
Valentine Burley
3bb9880468
anv/ci: Increase timeout for nightly JSL job
...
This has been timing out for a while now.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38071 >
2025-12-10 11:31:30 +00:00
Georg Lehmann
bb58ba2075
aco/optimizer: propagate salu fabs
...
Foz-DB Navi48:
Totals from 5156 (5.28% of 97637) affected shaders:
Instrs: 12713219 -> 12694317 (-0.15%); split: -0.15%, +0.00%
CodeSize: 67099236 -> 67037588 (-0.09%); split: -0.13%, +0.04%
VGPRs: 352620 -> 352608 (-0.00%)
SpillSGPRs: 22032 -> 22031 (-0.00%)
Latency: 68288972 -> 68271858 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 13639078 -> 13633997 (-0.04%); split: -0.04%, +0.00%
VClause: 235194 -> 235186 (-0.00%); split: -0.01%, +0.00%
SClause: 249057 -> 249012 (-0.02%); split: -0.03%, +0.01%
Copies: 963813 -> 960529 (-0.34%); split: -0.36%, +0.02%
Branches: 321041 -> 321039 (-0.00%)
PreSGPRs: 303392 -> 303295 (-0.03%); split: -0.03%, +0.00%
VALU: 7134563 -> 7134533 (-0.00%); split: -0.00%, +0.00%
SALU: 1913802 -> 1899948 (-0.72%); split: -0.72%, +0.00%
VOPD: 19914 -> 19885 (-0.15%); split: +0.01%, -0.15%
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38723 >
2025-12-10 10:07:12 +00:00
Georg Lehmann
04037c7af3
aco/optimizer: propagate salu fneg
...
Foz-DB Navi48:
Totals from 23796 (24.37% of 97637) affected shaders:
MaxWaves: 638922 -> 638898 (-0.00%)
Instrs: 32968990 -> 32880147 (-0.27%); split: -0.28%, +0.01%
CodeSize: 174252352 -> 173922400 (-0.19%); split: -0.20%, +0.01%
VGPRs: 1396472 -> 1396592 (+0.01%)
SpillSGPRs: 63672 -> 63599 (-0.11%)
Latency: 201025393 -> 200966204 (-0.03%); split: -0.05%, +0.02%
InvThroughput: 37429702 -> 37411026 (-0.05%); split: -0.06%, +0.01%
VClause: 534241 -> 534115 (-0.02%); split: -0.05%, +0.02%
SClause: 831765 -> 831559 (-0.02%); split: -0.07%, +0.05%
Copies: 2404134 -> 2400539 (-0.15%); split: -0.29%, +0.14%
Branches: 728518 -> 728503 (-0.00%); split: -0.00%, +0.00%
PreSGPRs: 1337403 -> 1336846 (-0.04%); split: -0.04%, +0.00%
PreVGPRs: 1017490 -> 1017521 (+0.00%); split: -0.00%, +0.00%
VALU: 18319620 -> 18318960 (-0.00%); split: -0.01%, +0.00%
SALU: 5069557 -> 5001384 (-1.34%); split: -1.38%, +0.03%
VOPD: 80235 -> 80172 (-0.08%); split: +0.13%, -0.21%
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38723 >
2025-12-10 10:07:12 +00:00
Georg Lehmann
8b1340a52c
aco/optimizer: validate uses
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38724 >
2025-12-10 09:40:13 +00:00
Georg Lehmann
ad3add311c
aco/optimizer: fix uses in to_uniform_bool_instr
...
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38724 >
2025-12-10 09:40:13 +00:00
Erik Faye-Lund
3b4d2c41f0
pan: add support for float-formats
...
Unlike what the comment said here, V9 does in fact support a single
float-format, so let's allow that.
But also, V10 and later supports FP16 formats, but this incorrect check
made that not work. Enable the FP16 formats also while we're at it. We
don't need any additional checks here, because the 16-bit unorm formats
were also added in V10, so util_format_any_to_unorm() does the right
thing here.
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Eric R. Smith <eric.smith@collabora.com >
Tested-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38848 >
2025-12-10 09:33:18 +01:00
Erik Faye-Lund
b925c4be4a
pan: make S8_UINT code behave like the rest
...
There's no reason why the S8_UINT check should be written in a different
way than the other checks here; let's make this consistent.
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org >
Reviewed-by: Eric R. Smith <eric.smith@collabora.com >
Tested-by: Yiwei Zhang <zzyiwei@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38848 >
2025-12-10 09:32:48 +01:00
Lionel Landwerlin
6e92720ece
anv/brw: drop cs_prog_key::lower_unaligned_dispatch usage
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38837 >
2025-12-10 07:44:31 +00:00
Lionel Landwerlin
c1197d88e2
vulkan/runtime: include unaligned dispatch bit in hashing
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38837 >
2025-12-10 07:44:31 +00:00
Jesse Natalie
0330b19b86
spirv2dxil: Move clip/cull merging from common passes to just spirv2dxil passes
...
Otherwise it gets run twice since it's part of vk_spirv_to_nir
Acked-by: Marek Olšák <marek.olsak@amd.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38465 >
2025-12-10 05:16:34 +00:00
Marek Olšák
0c400fbed9
nir: give nir_lower_clip_cull_distance_array_vars a better name
...
also rename the file
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38465 >
2025-12-10 05:16:34 +00:00
Marek Olšák
74995eb64d
nir: split gathering array sizes from nir_lower_clip_cull_distance_array_vars
...
nir_lower_clip_cull_distance_array_vars was sneakily updating
shader_info::clip/cull_distance_array_size.
This moves the gathering into a new function
nir_gather_clip_cull_distance_sizes_from_vars.
v2: remove assertions that prevented nir_lower_clip_cull_distance_array_vars
from being used with non-compact arrays
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com > (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38465 >
2025-12-10 05:16:34 +00:00