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Author SHA1 Message Date
Timothy Arceri 10c292acf6 glsl: remove unused member 
Unused since 063d62f142

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32239>
 2024-11-21 03:21:08 +00:00
Timothy Arceri 8ac81c5bb4 glsl: tidy up glsl_to_nir() params 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32239>
 2024-11-21 03:21:08 +00:00
Juston Li cbb3bb5c7b util/cache_test: Fix racey Cache.List test 
Instead of using unreliable polling to wait for foz db updater to parse
and load from the dynamic list, also use inotify to wait for foz db
updater close the list file after its done updating.

Fixes: 4dfd306454 ("disk_cache: Disable the "List" test for RO disk cache.")
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32237>
 2024-11-21 02:11:32 +00:00
Chia-I Wu 3e9b8488b6 panvk: fix frag_completed for layered rendering 
Make sure frag_completed is incremented once per render pass, regardless
of layer count.

This fixes

  [44354.379592] panthor fb000000.gpu: [drm] Failed to extend the tiler heap

in some cases.

Fixes: 157a4dc509 ("panvk/csf: Fix multi-layer rendering")
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32234>
 2024-11-21 01:01:08 +00:00
Chia-I Wu 9c6b71217d panvk: clang-format issue_fragment_jobs 
To avoid mixing cosmetic and functional changes in the following commit.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32234>
 2024-11-21 01:01:08 +00:00
Chia-I Wu 79a99a2c05 panvk: no need to map IB internally on valhall 
The hack is only needed before valhall.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12178
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32232>
 2024-11-21 00:33:18 +00:00
Georg Lehmann 0776b56ad6 nir: cse terminate/demote 
Foz-DB Navi21:
Totals from 32 (0.04% of 79206) affected shaders:
MaxWaves: 984 -> 976 (-0.81%)
Instrs: 7719 -> 7496 (-2.89%)
CodeSize: 43220 -> 42264 (-2.21%)
VGPRs: 856 -> 872 (+1.87%)
Latency: 62689 -> 62453 (-0.38%); split: -0.72%, +0.34%
InvThroughput: 8988 -> 8968 (-0.22%); split: -0.23%, +0.01%
VClause: 248 -> 249 (+0.40%)
SClause: 296 -> 293 (-1.01%)
Copies: 580 -> 534 (-7.93%); split: -9.31%, +1.38%
Branches: 181 -> 139 (-23.20%)
PreSGPRs: 841 -> 834 (-0.83%)
SALU: 1091 -> 933 (-14.48%)

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32235>
 2024-11-20 23:54:04 +00:00
Georg Lehmann a67ca0eb59 nir/instr_set: support instrs with no def 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32235>
 2024-11-20 23:54:04 +00:00
Georg Lehmann 7097b705b5 nir/instr_set: replace nir_instr_get_def_def with nir_instr_def 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32235>
 2024-11-20 23:54:04 +00:00
Georg Lehmann 4299809321 nir: return def for debug info in nir_instr_def 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32235>
 2024-11-20 23:54:04 +00:00
Benjamin Lee 8f25cc0bbc panvk: inherit sample count in secondary cmdbufs 
Fixes crashes in dEQP-VK.draw.dynamic_rendering.partial_secondary_cmd_buff.multiple_interpolation.*

    src/panfrost/vulkan/csf/panvk_vX_cmd_draw.c:1413: void panvk_cmd_draw(struct panvk_cmd_buffer *, struct panvk_draw_info *): Assertion `rasterization_samples == fbinfo->nr_samples' failed.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32238>
 2024-11-20 22:20:43 +00:00
Marek Olšák 680f7afe0b radeonsi: don't use nir_io_dont_optimize because it's deprecated 
There is a new environment variable that can be used instead.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:30 +00:00
Marek Olšák 7e959864b2 radeonsi: enable NGG culling for non-monolithic TES and GS 
It doesn't enable back face culling and small line culling. Those can only
be enabled for monolithic shaders. It only enables view culling and small
triangle culling.

Doing this has these minor advantages:

1. We can enable at least some culling immediately instead of when the first
   monolithic shader finishes compilation.

2. If back face culling and clip planes are disabled, we no longer compile
   monolithic TES and GS shader variants to get only view culling and small
   triangle culling.

3. shader-db will show culling code changes for TES and GS.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:30 +00:00
Marek Olšák d75df43b5f radeonsi: only compute and use min_direct_count on gfx7-8 
min_direct_count and multi_instances_smaller_than_primgroup
are only used by gfx7-8.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:29 +00:00
Marek Olšák 06292538ae radeonsi: add helper si_shader_culling_enabled 
it will contain more logic

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:29 +00:00
Marek Olšák d7415d3717 radeonsi: clean up and rename gfx10_edgeflags_have_effect 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:29 +00:00
Marek Olšák 5bf1ef94db radeonsi: return a better value for load_initial_edgeflags_amd 
Handle points and lines for all relevant shader stages.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:29 +00:00
Marek Olšák 6988967a1f radeonsi: rewrite/replace gfx10_ngg_get_vertices_per_prim 
Reuse si_get_input_prim (which is similar) and split it into 2 functions:
- si_get_output_prim_simplified
- si_get_num_vertices_per_output_prim

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:29 +00:00
Marek Olšák 963a84677e radeonsi: optionally return MESA_PRIM_UNKNOWN from si_get_input_prim 
it will be used later

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:29 +00:00
Marek Olšák 691a9ccb33 radeonsi: prepare for making SI_NGG_CULL_TRIANGLES/LINES VS only, rename them 
They will have no effect on TES and GS, so this will make it more obvious.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:29 +00:00
Marek Olšák 1b03b78bf8 ac/surface: adjust HiZ enablement 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32257>
 2024-11-20 21:08:29 +00:00
Samuel Pitoiset aca20fd2e1 radv: mark VERDE (GFX6) as Vulkan 1.3 conformant 
https://www.khronos.org/conformance/adopters/conformant-products#submission_820

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32255>
 2024-11-20 19:26:20 +00:00
Karmjit Mahil 21baf2f6c1 tu: Fix memory leaks on VK_PIPELINE_COMPILE_REQUIRED 
For a TU_PIPELINE_GRAPHICS_LIB we were taking a ref to the descriptor
set layout but never releasing on VK_PIPELINE_COMPILE_REQUIRED.
Since VK_PIPELINE_COMPILE_REQUIRED is technically an error, the user
doesn't call vkDestroyPipeline() for it so the descriptor sets
referenced were never getting freed.

Addresses:
```
Direct leak of 304 byte(s) in 1 object(s) allocated from:
    #0 0x7fa5a93ee0 in __interceptor_malloc
       ../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:145
    #1 0x7fa44bac84 in vk_default_alloc ../src/vulkan/util/vk_alloc.c:26
    #2 0x7fa32ea5d8 in vk_alloc ../src/vulkan/util/vk_alloc.h:48
    #3 0x7fa32ea60c in vk_zalloc ../src/vulkan/util/vk_alloc.h:56
    #4 0x7fa32ea750 in vk_descriptor_set_layout_zalloc
       ../src/vulkan/runtime/vk_descriptor_set_layout.c:49
    #5 0x7fa306fc98 in tu_CreateDescriptorSetLayout(VkDevice_T*,
       VkDescriptorSetLayoutCreateInfo const*, VkAllocationCallbacks
const*, VkDescriptorSetLayout_T**)
../src/freedreno/vulkan/tu_descriptor_set.cc:161
```
and
```
Direct leak of 48 byte(s) in 1 object(s) allocated from:
    #0 0x7f9b4b3ee0 in __interceptor_malloc
       ../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:145
    #1 0x7f9925e900 in ralloc_size ../src/util/ralloc.c:118
    #2 0x7f9925e8d4 in ralloc_context ../src/util/ralloc.c:105
    #3 0x7f98b4b214 in tu_pipeline_builder_build<(chip)7>
       ../src/freedreno/vulkan/tu_pipeline.cc:3898
    #4 0x7f98b46bd8 in tu_graphics_pipeline_create<(chip)7>
       ../src/freedreno/vulkan/tu_pipeline.cc:4203
    #5 0x7f98b22588 in VkResult
       tu_CreateGraphicsPipelines<(chip)7>(VkDevice_T*,
VkPipelineCache_T*, unsigned int, VkGraphicsPipelineCreateInfo const*,
VkAllocationCallbacks const*, VkPipeline_T**)
../src/freedreno/vulkan/tu_pipeline.cc:4234
```
seen in:
dEQP-VK.pipeline.pipeline_library.shader_module_identifier.pipeline_from_id.graphics.4_variants.no_spec_constants.no_pipeline_cache.all_zeros_id.no_exec_properties.vert_tesc_tese_frag

Cc: mesa-stable
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32188>
 2024-11-20 18:52:35 +00:00
Zan Dobersek 2817a286e0 tu: ensure completion of generic-clear resolves for color, depth/stencil clears 
Combination of concurrent resolve groups and generic clear support on a750
exposed a problem around color and depth/stencil clears. With all resolves
now non-blocking in nature, we need a guarantee that clears issued through
commands will complete before any future resolves.

To achieve that, in case of generic clears being used, a cache flush is
done in order to generate the CCU_RESOLVE_CLEAN event that will ensure any
future resolve will block until the just-emitted clears are completed.

Fixes following flaky CTS tests on a750:
  dEQP-VK.pipeline.monolithic.framebuffer_attachment.2d_array_32x32_48x48_4_ms
  dEQP-VK.pipeline.pipeline_library.framebuffer_attachment.2d_array_32x32_48x48_4_ms

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Fixes: 25b73dff5a ("tu/a7xx: use concurrent resolve groups")
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32242>
 2024-11-20 17:39:31 +00:00
Alyssa Rosenzweig 4477eed302 compiler: make glsl_sampler_dim available to CL 
useful with the NIR bindings for image load/store.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig 39afffe956 nir: split off some definitions for OpenCL 
we want some enum values on device for NIR->CL bindings. specifically,
src_type/dest_type indices.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig e3b14481e3 vtn: preserve name, is_return in bindings 
we want to plumb as much signature through as possible.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig 733ec7c675 vtn: use named parameters in bindgen 
If the input spir-v isn't stripped, preserving the names makes the generated
header more readable. This makes semantic autocomplete (IDEs) work properly with
vtn_bindgen prototypes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig f25b7103fe vtn: use rzalloc in bindgen 
we don't want garbage.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig 5d7a230324 vtn: gather function parameter names 
Unstripped SPIR-V libraries generated from OpenCL have lots of function
parameter names. Gather them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig d248618d81 nir/print: print parameter names in calls 
if we have them. example:

call libagx_geometry_input_address %10, p %3, vtx %9, location %0 (0x0)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig 6b35d7eb13 nir/print: annotate entrypoints 
we can have multiple in a collection of OpenCL kernels.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig eebfbf5ecd nir/print: print function signature 
parameter dimensions and names if we have them. example:

decl_function libagx_geometry_input_address (64 return, 64 p, 32 vtx, 32 location)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig 3da8444be5 nir: add names to function parameters 
SPIR-V has this information. We should try to preserve it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:51 +00:00
Alyssa Rosenzweig 61862b209e nir/opt_algebraic: optimize convert_uint_sat(ulong) 
I wrote this in my query copy shader, it didn't get the codegen I expected, so I
investigated.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:50 +00:00
Alyssa Rosenzweig 07ba9335ae nir/conversion_builder: avoid redundant uint->uint clamp 
algebraic will clean up but there's no reason to generate it.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:50 +00:00
Alyssa Rosenzweig 76927a3b43 nir/lower_convert_alu_types: use intrinsics_pass 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
 2024-11-20 16:53:50 +00:00
Alyssa Rosenzweig b94d640ba0 agx: make needs_g13x_coherency a tri-state 
If we know the shader doesn't use global atomics, we don't care if the target
has this quirk or not and we can produce a single binary for all G13/G14
hardware. Model that in the shader key.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32224>
 2024-11-20 16:10:11 +00:00
Alyssa Rosenzweig 358f40ea90 panfrost: switch to u_tristate 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32224>
 2024-11-20 16:10:11 +00:00
Alyssa Rosenzweig 847e0e78f8 util: add u_tristate data structure 
rip the pan_tristate enum from panfrost and move it to common.

I've often wanted some sort of "yes/no/maybe" or "true/false/unknown" or
"always/never/sometimes" data structure. This adds a common one that is
hopefully neutral enough to cover all of the above.

Asahi will use this.

The Intel drivers could be ported to this (brw_sometimes/elk_sometimes), it
should be straightforward but I don't want to do that without being able to
easily test those changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32224>
 2024-11-20 16:10:11 +00:00
David Rosca 1cf5ae4854 radeonsi/vpe: Don't allow DCC surfaces 
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32136>
 2024-11-20 15:43:30 +00:00
David Rosca f5903ab60d radeonsi/vpe: Set correct surface swizzle mode 
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32136>
 2024-11-20 15:43:30 +00:00
Erik Faye-Lund 60146cc57c panvk: implement sampleRateShading 
It doesn't feel great that we need to compile multiple identical shaders
just because we're going to toggle a bit in the command-stream, but this
seems to be the current state-of-art in mesa, so hmpf...

It makes state-validation trivial, so there's that.

This is loosely based on what NVK does.

Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32004>
 2024-11-20 15:16:18 +00:00
Mary Guillemard 83c2d82637 panvk: Advertise VK_KHR_map_memory2 
Already supported.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32248>
 2024-11-20 14:45:14 +00:00
Mary Guillemard 6ffde9294e panvk: Advertise VK_KHR_index_type_uint8 
We already support VK_EXT_index_type_uint8 and this is the promoted
version of it.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32248>
 2024-11-20 14:45:14 +00:00
Mary Guillemard 52a03ab179 panvk: Enable shaderInt16 
We already have all the lowering we need for this.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32248>
 2024-11-20 14:45:14 +00:00
Mary Guillemard 6e8cfc3ce4 panvk: Enable depthClamp and depthBiasClamp 
Both are implemented but were not enabled.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32248>
 2024-11-20 14:45:14 +00:00
Jose Maria Casanova Crespo 48978d5ce5 rpi4/ci: Increase timeout for rusticl jobs. 
Test run time has increased to 26min so last days
the nightly jobs have reached the 30min timeout just
before finishing the test execution.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32243>
 2024-11-20 14:09:04 +00:00
Jose Maria Casanova Crespo 4675dfb959 vc4/ci: fails udpate after last piglit uprev 
spec@arb_clear_texture@arb_clear_texture-supported-formats was fixed
with https://gitlab.freedesktop.org/mesa/piglit/-/merge_requests/970

Fixes: 93c8a65dee ("Uprev Piglit to d04d6fff00849a2a8e29ef3251c6ca04a2f68dc7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32243>
 2024-11-20 14:09:04 +00:00
Philipp Zabel 7805a20d7b etnaviv/nn: Enable fused ReLU activation 
Handle fused ReLU activation by setting the corresponding
flag in the NN engine configuration.

Reviewed-by: Tomeu Vizoso <tomeu@tomeuvizoso.net>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31981>
 2024-11-20 13:33:11 +00:00