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Author SHA1 Message Date
Tomeu Vizoso 0ef5aa5fb6 etnaviv/ml: Fix padding for convolutions in V8 
Two bits that aren't used in V7 seem to be used for this in V8.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
 2024-11-13 07:39:35 +00:00
Tomeu Vizoso b4ba62fcda etnaviv/ml: Add encoding of coefficients for V8 
In V8 the weights and biases of convolution operations are encoded with
a totally different scheme.

The initial reverse engineering and implementation was done by:

Philipp Zabel <p.zabel@pengutronix.de>

Support for zero run length encoding and average bias is not implemented yet.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
 2024-11-13 07:39:35 +00:00
Tomeu Vizoso f3d765ed5d etnaviv/ml: Split V7 coefficient encoding to a new file 
In preparation for V8 support, which uses a completely different
encoding.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
 2024-11-13 07:39:35 +00:00
Tomeu Vizoso 3744defc7e etnaviv: Add script to decode weights in Huffman format 
The bitstream encoding is based on information reverse engineered by:

Philipp Zabel <p.zabel@pengutronix.de>

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
 2024-11-13 07:39:35 +00:00
Tomeu Vizoso 88b5b998d2 etnaviv/ml: Rework the dumping of tensors 
Name the file dumps after the operation and suboperation they belong to.

Also dump the command stream for each operation.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
 2024-11-13 07:39:35 +00:00
Tomeu Vizoso 4ca98fa662 etnaviv/ci: Add expectation files for the VIPNano-SI+ NPU 
This is the NPU in the NXP i.MX8MP SoC.

Initially, only convolutions are supported.

Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
 2024-11-13 07:39:35 +00:00
Tomeu Vizoso f9bb9aa7d5 etnaviv/nn: Fix use of etna_core_info 
Right now we were retrieving the properties of the NPU from the
etna_core_info of the GPU.

Fixes: 92a6f697d5 ("etnaviv: npu: Switch to use etna_core_info")
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
 2024-11-13 07:39:35 +00:00
Tomeu Vizoso 70bff0c971 etnaviv/ml: Fix includes 
etnaviv_ml.h uses dynarray, but the u_inlines.h header is needed by
some of the files that include it.

Fixes: d6473ce28e ("etnaviv: Use NN cores to accelerate convolutions")
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31842>
 2024-11-13 07:39:35 +00:00
Peyton Lee 79b34a6539 frontends/va: add support for VAProcColorStandardExplicit 
for video post processing,
add support for VAProcColorStandardExplicit

Signed-off-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32087>
 2024-11-13 06:52:39 +00:00
Peyton Lee a9e4461c26 frontends/va: add support for VAProcColorStandardExplicit 
for video post processing,
add support for VAProcColorStandardExplicit

Signed-off-by: Peyton Lee <peytolee@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32087>
 2024-11-13 06:52:39 +00:00
Martin Roukala (né Peres) acb48bde44 ci: disable mupuf's farm 
I'm about to have an electric renovation at my house, which will start
by having a 4h downtime.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32091>
 2024-11-13 06:29:55 +00:00
Tapani Pälli fbe5d41b58 anv: extend Wa_14017794102 with lineage Wa_14023061436 
This workaround is applicable for Xe3 with new lineage.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31963>
 2024-11-13 04:54:32 +00:00
Tapani Pälli 9429c0075b anv: utilize ray query bo per queue for Wa_14022863161 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31963>
 2024-11-13 04:54:32 +00:00
Tapani Pälli 1bd9e51a73 intel/dev: update mesa_defs.json from workaround database 
Brings in some PTL workarounds.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31963>
 2024-11-13 04:54:32 +00:00
Benjamin Otte e757238370 vulkan/wsi: Support alpha swapchains on win32 
Map VkSwapchainCreateInfoKHR.compositeAlpha to corresponding
DXGI_SWAP_CHAIN_DESC1.alphaMode.

Add VK_COMPOSITE_ALPHA_POST_MULTIPLIED_BIT_KHR to capabilities as
it was missing there.

Signed-off-by: Benjamin Otte <otte@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32048>
 2024-11-13 04:26:46 +00:00
Iván Briano f2f4206d49 intel/decoder: fix INTEL_DEBUG=bat 
Now that all genxml filenames are in verx10 format, we don't need to fix
the number up when we look them up.

Fixes: 8906816f49 ("anv,hasvk,genxml: Rename genxml files using verx10")

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32099>
 2024-11-13 00:45:40 +00:00
M Henning 68cdcf5bbc nvk: Fix two typos in comments 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32086>
 2024-11-12 23:26:49 +00:00
M Henning 05770374a3 nvk: Remove params for dirty_cbufs_for_descriptors 
dyn_start/dyn_end are unused now.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32086>
 2024-11-12 23:26:49 +00:00
M Henning dc12c78235 nvk: Fix invalidation of NVK_CBUF_TYPE_DYNAMIC_UBO 
Because dyn_start and dyn_end are indices into
nvk_root_descriptor_table->dynamic_buffers, we would need to offset
cbuf->dynamic_idx by
nvk_root_descriptor_table->set_dynamic_buffer_start[cbuf->desc_set]
in order to do those comparisons correctly.

We could do that, but it's simpler and no less precise to sinply
re-use the same comparison that we do in the other cases here.

This fixes a rendering artifact in Baldur's Gate 3 (Vulkan), which
regressed with the commit listed below.

Fixes: 091a945b57 ("nvk: Be much more conservative about rebinding cbufs")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32086>
 2024-11-12 23:26:49 +00:00
M Henning 64f17c1391 nvk/cmd_buffer: Pass count to set_root_array 
Previously, we were passing the end index which was incorrect.
Also, improve the macros so that they can take an expression for
the count.

Fixes: b2d85ca36f ("nvk: Use helper macros for accessing root descriptors")
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32086>
 2024-11-12 23:26:49 +00:00
Lionel Landwerlin 08530462bd anv: implement Wa_16011107343/22018402687 for generated draws 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32059>
 2024-11-12 22:48:39 +00:00
Lionel Landwerlin 53eed61a90 intel: make sure intel_wa.h can be included by opencl code 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32059>
 2024-11-12 22:48:39 +00:00
Lionel Landwerlin 672d41d22a anv: split generated draw flags from mocs/dword-count 
We'll add more flags.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32059>
 2024-11-12 22:48:39 +00:00
Lionel Landwerlin d6acb56f11 anv: update shader descriptor resource limits 
Some limits got stuck to the old binding table limits. Those don't
apply anymore since EXT_descriptor_indexing was implemented.

Fixes: 6e230d7607 ("anv: Implement VK_EXT_descriptor_indexing")
Fixes: 96c33fb027 ("anv: enable direct descriptors on platforms with extended bindless offset")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31999>
 2024-11-12 22:01:52 +00:00
Gurchetan Singh 1794ff7309 gfxstream: use canonical Mesa dependencies 
drm_dep -> dep_libdrm, essentially.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32062>
 2024-11-12 19:21:10 +00:00
Gurchetan Singh 5e9c14395d gfxstream: guest: use internal version of AEMU headers + impls 
This removes the dependency of libaemu-v0.1.2 on
gfxstream guest vulkan.

ALSO:

find ./ -type f -exec sed -i -e 's/android::base/gfxstream::aemu/g' {} \;

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32062>
 2024-11-12 19:21:10 +00:00
Gurchetan Singh a8c1021d79 gfxstream: modify libaemu for Mesa use case 
- Modifications to directory paths.
- saveStringArray moved to Stream.h/Stream.cpp to avoid
  importing StreamSerializing
- C++ include guards
- Namespace changes

find ./ -type f -exec sed -i -e 's/namespace android/namespace gfxstream/g' {} \;

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32062>
 2024-11-12 19:21:10 +00:00
Gurchetan Singh 43e378c537 gfxstream: aemu: vendor it 
This imports certain files from libaemu into gfxstream
guest.

Some are quite specific to gfxstream (Stream, ring_buffer) and others
we expect to Mesa-ify with time (AlignedBuf, Allocator) [probably
while keeping some C++ interface].

The main benefit of importing is easier refactoring and packaging.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32062>
 2024-11-12 19:21:10 +00:00
Gurchetan Singh c7decb61ee gfxstream: nuke EntityManager.h include 
So this is not actually used.

Reviewed-by: Aaron Ruby <aruby@blackberry.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32062>
 2024-11-12 19:21:10 +00:00
Georg Lehmann 8f094a7762 nir: handle fmul(a,a)/ffma(a,a,b) in nir_def_all_uses_ignore_sign_bit 
Foz-DB Navi31:
Totals from 436 (0.55% of 79395) affected shaders:
Instrs: 808917 -> 805868 (-0.38%)
CodeSize: 4269056 -> 4246512 (-0.53%)
Latency: 5827077 -> 5819815 (-0.12%); split: -0.13%, +0.00%
InvThroughput: 625482 -> 622959 (-0.40%); split: -0.41%, +0.00%
SClause: 21797 -> 21756 (-0.19%); split: -0.23%, +0.04%
Copies: 48502 -> 48505 (+0.01%); split: -0.04%, +0.05%
VALU: 481686 -> 479074 (-0.54%); split: -0.54%, +0.00%
SALU: 76699 -> 76700 (+0.00%)

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31844>
 2024-11-12 18:03:57 +00:00
Georg Lehmann 7e8a08ae77 aco: use nir_def_all_uses_ignore_sign_bit 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31844>
 2024-11-12 18:03:57 +00:00
Georg Lehmann 7d5db1ee52 pan/bi: use nir_def_all_uses_ignore_sign_bit 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31844>
 2024-11-12 18:03:57 +00:00
Georg Lehmann 34f41abe24 nir: add nir_def_all_uses_ignore_sign_bit 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31844>
 2024-11-12 18:03:57 +00:00
Samuel Pitoiset 44fa24580f radv: optimize the pipe misaligned L2 cache invalidation on GFX11 
When using the subresource range, it's possible to reduce the number
of L2 cache invalidations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31921>
 2024-11-12 17:27:39 +00:00
Samuel Pitoiset 7a3a65c0c4 radv: pass the image subresource range to radv_{src,dst}_access_flush() 
This will allow us to optimize the pipe misaligned special case for
GFX11 because only the first mip in the mip-tail needs the L2 cache
invalidation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31921>
 2024-11-12 17:27:39 +00:00
Samuel Pitoiset f7a39fac10 radv: use vk_image_view_subresource_range() when possible 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31921>
 2024-11-12 17:27:39 +00:00
Samuel Pitoiset 7a8b725d03 radv: determine the first mip that is pipe misaligned on GFX10+ 
This will allow us to optimize the GFX11 case where not all mips are
affected by the L2 invalidation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31921>
 2024-11-12 17:27:39 +00:00
Samuel Pitoiset c5d5f2fbef radv: move the GFX11 special case for mips to radv_image_is_pipe_misaligned() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31921>
 2024-11-12 17:27:39 +00:00
Samuel Pitoiset 65bb39bf96 radv: do not always invalidate L2 for GPUs with non-coherent RBs on GFX10+ 
According to PAL, L2 should be invalidated only for images with
DCC/HTILE even on GPUs with non-coherent RBs. In practice, most of
the images have either DCC/HTILE but this can reduce the number of L2
flushes for images without any compression.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31921>
 2024-11-12 17:27:39 +00:00
Boris Brezillon eff8a3517d panvk: Enable CI on G610 
The number of failures/crashes/flakes is still considerable, but the
goal is to catch regressions when fixing bugs or adding features, so
let's enable CI on G610 anyway.

We might decide to turn g610-vk into a post-merge jobs if CI on G610
is too unstable.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31524>
 2024-11-12 16:46:47 +00:00
Samuel Pitoiset 5e0b81413d radv: emit nir_debug_break instructions when the trap handler is enabled 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32061>
 2024-11-12 16:05:17 +00:00
Samuel Pitoiset 2d5df46c25 aco: emit nir_intrinsic_debug_break 
s_trap is used to enter the trap.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32061>
 2024-11-12 16:05:17 +00:00
Samuel Pitoiset b6c72b3717 spirv: handle NonSemantic.DebugBreak to emit nir_debug_break() 
NonSemantic SPIR-V allows to declare extended instructions. This
NonSemantic.DebugBreak allows to emit a breakpoint.

See https://htmlpreview.github.io/?https://github.com/KhronosGroup/SPIRV-Registry/blob/main/nonsemantic/NonSemantic.DebugBreak.html

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32061>
 2024-11-12 16:05:17 +00:00
Samuel Pitoiset a85f0143e0 nir: add nir_intrinsic_debug_break instruction 
This instruction can be used as a breakpoint in shaders to enter a
trap if supported by the driver. It will be used to handle
NonSemantic.DebugBreak in SPIR-V.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32061>
 2024-11-12 16:05:17 +00:00
Jose Maria Casanova Crespo 5b951bcdd7 v3d: Enable Early-Z with discards when depth updates are disabled 
The Early-Z optimization is disabled when there is a discard
instruction in the shader used in the draw call.

But if discard is the only reason to disable Early-Z, and at
draw call time the updates in the draw call are disabled we
can enable Early-Z using a shader variant.

If there are occlussion queries active we also need to disable
Early-z optimization.

So this patch enables Early-Z in this scenario.

The performance improvement is significant when running gfxbench
benchmark showing an average improvement of 11.15%

fps_avg  helped:  gl_gfxbench_aztec_high.trace:  3.13 ->  3.73 (19.13%)
fps_avg  helped:  gl_gfxbench_aztec.trace:       4.82 ->  5.68 (17.88%)
fps_avg  helped:  gl_gfxbench_manhattan31.trace: 5.10 ->  6.00 (17.59%)
fps_avg  helped:  gl_gfxbench_manhattan.trace:   7.24 ->  8.36 (15.52%)
fps_avg  helped:  gl_gfxbench_trex.trace:       19.25 -> 20.17 ( 4.81%)

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32028>
 2024-11-12 13:26:38 +00:00
Sagar Ghuge fef8490eb9 anv: Enable MCS_CCS compression on Gfx12+ 
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32009>
 2024-11-12 12:27:21 +00:00
Karmjit Mahil 2a7df331af nir: Fix no_lower_set leak on early return 
Addresses:
```
Indirect leak of 256 byte(s) in 2 object(s) allocated from:
    #0 0x7faaf53ee0 in __interceptor_malloc
       ../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:145
    #1 0x7fa8cfe900 in ralloc_size ../src/util/ralloc.c:118
    #2 0x7fa8cfeb20 in rzalloc_size ../src/util/ralloc.c:152
    #3 0x7fa8cff004 in rzalloc_array_size ../src/util/ralloc.c:232
    #4 0x7fa8d06a84 in _mesa_set_init ../src/util/set.c:133
    #5 0x7fa8d06bcc in _mesa_set_create ../src/util/set.c:152
    #6 0x7fa8d0939c in _mesa_pointer_set_create ../src/util/set.c:613
    #7 0x7fa95e5790 in nir_lower_mediump_vars
       ../src/compiler/nir/nir_lower_mediump.c:574
    #8 0x7fa862c1c8 in tu_spirv_to_nir(tu_device*, void*, unsigned long,
       VkPipelineShaderStageCreateInfo const*, tu_shader_key const*,
pipe_shader_type) ../src/freedreno/vulkan/tu_shader.cc:116
    #9 0x7fa8646f24 in tu_compile_shaders(tu_device*, unsigned long,
       VkPipelineShaderStageCreateInfo const**, nir_shader**,
tu_shader_key const*, tu_pipeline_layout*, unsigned char const*,
tu_shader**, char**, void*, nir_shader**, VkPipelineCreationFeedback*)
../src/freedreno/vulkan/tu_shader.cc:2741
    #10 0x7fa85a16a4 in tu_pipeline_builder_compile_shaders
	../src/freedreno/vulkan/tu_pipeline.cc:1887
    #11 0x7fa85eb844 in tu_pipeline_builder_build<(chip)7>
	../src/freedreno/vulkan/tu_pipeline.cc:3923
    #12 0x7fa85e6bd8 in tu_graphics_pipeline_create<(chip)7>
	../src/freedreno/vulkan/tu_pipeline.cc:4203
    #13 0x7fa85c2588 in VkResult
	tu_CreateGraphicsPipelines<(chip)7>(VkDevice_T*,
VkPipelineCache_T*, unsigned int, VkGraphicsPipelineCreateInfo const*,
VkAllocationCallbacks const*, VkPipeline_T**)
../src/freedreno/vulkan/tu_pipeline.cc:4234
```
seen in:
dEQP-VK.binding_model.mutable_descriptor.single.switches.uniform_texel_buffer_storage_image.update_write.no_source.no_source.pool_expand_types.pre_update.no_array.vert

Fixes: 7e986e5f04 ("nir/lower_mediump_vars: Don't lower mediump shared vars with atomic access.")
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32057>
 2024-11-12 11:48:11 +00:00
Karmjit Mahil c923eff742 tu: Fix potential alloc of 0 size 
We can end up calling vk_multialloc_alloc with 0 size when
`attachment_count` is 0 and `clearValueCount` is 0.

Addressed:
```
Direct leak of 1 byte(s) in 1 object(s) allocated from:
    #0 0x7faf033ee0 in __interceptor_malloc
       ../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:145
    #1 0x7fada5cc10 in vk_default_alloc ../src/vulkan/util/vk_alloc.c:26
    #2 0x7fac50b270 in vk_alloc ../src/vulkan/util/vk_alloc.h:48
    #3 0x7fac555040 in vk_multialloc_alloc
       ../src/vulkan/util/vk_alloc.h:234
    #4 0x7fac555040 in void
       tu_CmdBeginRenderPass2<(chip)7>(VkCommandBuffer_T*,
VkRenderPassBeginInfo const*, VkSubpassBeginInfo const*)
../src/freedreno/vulkan/tu_cmd_buffer.cc:4634
    #5 0x7fac900760 in vk_common_CmdBeginRenderPass
       ../src/vulkan/runtime/vk_render_pass.c:261
```
seen in:
dEQP-VK.robustness.robustness2.bind.notemplate.r32i.dontunroll.nonvolatile.uniform_texel_buffer.no_fmt_qual.len_252.samples_1.1d.frag

Fixes: 4cfd021e3f ("turnip: Save the renderpass's clear values in the cmdbuf state.")
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32057>
 2024-11-12 11:48:11 +00:00
Karmjit Mahil 53c2d5e426 tu: Fix push_set host memory leak on command buffer reset 
Addresses:
```
Direct leak of 192 byte(s) in 1 object(s) allocated from:
    #0 0x7fbe5e4230 in __interceptor_realloc
       ../../../../src/libsanitizer/asan/asan_malloc_linux.cpp:164
    #1 0x7fbd008bf4 in vk_default_realloc
       ../src/vulkan/util/vk_alloc.c:37
    #2 0x7fbbabb2fc in vk_realloc ../src/vulkan/util/vk_alloc.h:70
    #3 0x7fbbaead38 in tu_push_descriptor_set_update_layout
       ../src/freedreno/vulkan/tu_cmd_buffer.cc:3173
    #4 0x7fbbaeb0b4 in tu_push_descriptor_set
       ../src/freedreno/vulkan/tu_cmd_buffer.cc:3203
    #5 0x7fbbaeb500 in tu_CmdPushDescriptorSet2KHR(VkCommandBuffer_T*,
       VkPushDescriptorSetInfoKHR const*)
../src/freedreno/vulkan/tu_cmd_buffer.cc:3235
    #6 0x7fbbe35c80 in vk_common_CmdPushDescriptorSetKHR
       ../src/vulkan/runtime/vk_command_buffer.c:300
```
seen in:
dEQP-VK.binding_model.shader_access.secondary_cmd_buf.bind.with_push.sampler_mutable.tess_eval.multiple_discontiguous_descriptors.1d_array

Fixes: 03294e1dd1 ("turnip: Keep a host copy of push descriptor sets.")
Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32057>
 2024-11-12 11:48:11 +00:00
Samuel Pitoiset 5f79b8ea2d radv,aco: save/restore overwritten VGPRs in the trap handler shader 
The trap currently doesn't return to the shader but it will be needed
for example for the debug mode.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32056>
 2024-11-12 11:16:13 +00:00