anv: extend Wa_14017794102 with lineage Wa_14023061436
This workaround is applicable for Xe3 with new lineage. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31963>
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@@ -1132,7 +1132,7 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
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pipeline->base.scratch_size);
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btd.ScratchSpaceBuffer = scratch_surf >> ANV_SCRATCH_SPACE_SHIFT(GFX_VER);
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}
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#if INTEL_NEEDS_WA_14017794102
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#if INTEL_NEEDS_WA_14017794102 || INTEL_NEEDS_WA_14023061436
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btd.BTDMidthreadpreemption = false;
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#endif
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}
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@@ -1184,7 +1184,7 @@ cmd_buffer_trace_rays(struct anv_cmd_buffer *cmd_buffer,
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.BindingTablePointer = surfaces->offset,
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.NumberofThreadsinGPGPUThreadGroup = 1,
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.BTDMode = true,
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#if INTEL_NEEDS_WA_14017794102
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#if INTEL_NEEDS_WA_14017794102 || INTEL_NEEDS_WA_14023061436
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.ThreadPreemption = false,
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#endif
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},
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@@ -350,7 +350,7 @@ init_common_queue_state(struct anv_queue *queue, struct anv_batch *batch)
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*/
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.offset = device->btd_fifo_bo->offset,
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};
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#if INTEL_NEEDS_WA_14017794102
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#if INTEL_NEEDS_WA_14017794102 || INTEL_NEEDS_WA_14023061436
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btd.BTDMidthreadpreemption = false;
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#endif
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}
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