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Author SHA1 Message Date
Mark Janes b96019f82b intel/fs: use generated workaround helpers for Wa_14010017096 
This workaround does not apply beyond gen 12.0.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21746>
 2023-03-07 00:10:33 +00:00
Alyssa Rosenzweig 952bd63d6d nir/opt_barrier: Generalize to control barriers 
For GLSL, we want to optimize code like

   memoryBarrierBuffer();
   controlBarrier();

into a single scoped_barrier intrinsic for the backend to consume. Now that
backends can get scoped_barriers everywhere, what's left is enabling backends to
combine these barriers together. We already have an Intel-specific pass for
combining memory barriers; it just needs a teensy bit of generalization to allow
combining all sorts of barriers together.

This avoids code quality regression on Asahi when switching to purely scoped
barriers. It's probably useful for other backends too.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21661>
 2023-03-06 22:09:27 +00:00
Faith Ekstrand 83fd7a5ed1 intel: Use nir_lower_tex_options::lower_index_to_offset 
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21546>
 2023-03-06 21:38:32 +00:00
Eric Engestrom 2b1e9b0fd6 anv: add linker script to fix android symbols 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21631>
 2023-03-04 07:41:10 +00:00
Lionel Landwerlin 938f7a48b2 anv: VK_EXT_image_sliced_view_of_3d 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>
 2023-03-04 06:12:46 +00:00
Faith Ekstrand 7e1b62ea5b isl: Set Depth to array len for 3D storage images 
This is necessary for RESINFO to work properly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>
 2023-03-04 06:12:46 +00:00
Faith Ekstrand 74e6e207fe intel/blorp: Set array_len for 3D images properly 
We need to minify the depth so we don't set a size that's out-of-bounds.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21376>
 2023-03-04 06:12:46 +00:00
Jordan Justen b02600cde1 intel/vk/grl: genX-ify grl_cl_kernel_name() 
I don't see any code calling this, but with multiple gens, the symbol
name would conflict.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>
 2023-03-03 21:37:19 +00:00
Jordan Justen d68c9e0dcf intel/vk/grl: genX-ify genX_grl_uuid.cpp 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>
 2023-03-03 21:37:19 +00:00
Jordan Justen 14007a525b intel/vk/grl: Allow grl/grl_cl_kernel.h to be included by C++ files 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>
 2023-03-03 21:37:19 +00:00
Jordan Justen 4a7ddc4841 intel/vk/grl: Allow genX_grl.h to be included by C++ files 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>
 2023-03-03 21:37:19 +00:00
Jordan Justen 3251db1270 intel/vk/grl: Don't include anv_private.h in genX_grl.h 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21670>
 2023-03-03 21:37:19 +00:00
Lionel Landwerlin afb0289d7c blorp: add dependency on idep_intel_dev 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3c9a8f7a6d ("intel/dev: generate helpers to identify platform workarounds")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8421
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21679>
 2023-03-03 13:04:23 +00:00
Lionel Landwerlin 1d9cf8f381 anv: add gfx9 generated draw support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 3ac7d5f258 anv: remove unused item_count parameter 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin ec66054426 anv: use a list of generated shaders 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin b32303c369 anv: move common shader code into header 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin ac71719d4a anv: pack more data into generated draws input 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 200cec935d anv: use 64bit int support in generation shaders 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin a2026bf5f9 anv: rename generated draws for Gfx11 
We'll need different shaders for Gfx9

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin caf2389bc5 anv: use a single generation shader for indirect draws 
The indirect draw count shader can be used as a more generic case of
the indirect draw one. We'll never enter the last condition of the
shader (writing the MI_BATCH_BUFFER_START) with non count variants of
draws.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 897a92f576 anv: remove MI_NOOPs at the end of the generation batch 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin aa18d52728 anv: make sure mi_memcpy lands before push constant loads 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e2dc32d755 ("anv: move functions around to plan for generated draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin e68615aeaa anv: fix indirect draws VF cache tracking of index buffer 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e2dc32d755 ("anv: move functions around to plan for generated draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 1454b789b1 anv: fix 3DSTATE_PS emission in generation shaders 
We have to use the helper and also were missing the vector mask
programming.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 8f16ca8741 anv: remove commented code 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin f5dc88910f anv: remove pre hasvk split assert 
With softpin we should not always expect a BO in addresses.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin ae398284c9 anv: limit push constant dirtyness with generation shaders 
We only use the fragment shader push constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 2ea106e758 anv: correctly program 3DSTATE_SF in generation shaders 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin e698040061 anv: remove BTI related flush in generation shaders 
Earlier versions of the generation shaders were using the binding
table. We since switch to A64 messages. So the flush can be removed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 1dcb536acd anv: remove copied code from generation shader 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 63fa6d9f49 anv: fix generated forward jump with more than 67M draws 
The issue here is that for draw indirect count variants, we want to
jump after the last generated draw call to the next location where
commands are. But if we have more than 67M draws (8k * 8k chunks), we
only know the location once we've generated each of the 8k * 8k
chunks.

This change adds a CPU side pointer in the push constant struct so
that we can create a single linked list of chunks to edit and go
through to write the correct jump address after all the generated
space has been allocated.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c950fe97a0 ("anv: implement generated (indexed) indirect draws")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin c1c680c08b anv: correctly reset generation address on command buffer reset 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 4246a519f3 anv: fix incorrect parameter 
cmd_buffer_update_dirty_vbs_for_gfx8_vb_flush takes a value RANDOM/SEQUENTIAL. Not a boolean.
Fortunately this worked okay because true == RANDOM

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20497>
 2023-03-03 11:30:54 +00:00
Lionel Landwerlin 6ee7a2ecfa anv: pull Wa_14016118574 out of some loop not changing state 
The WA is meant to be here to apply some state that is not propagated
properly inside the HW. But if you have a loop like :

for ( ... ) {
  emit(3DPRIMITIVE, some param);
}

You're not really changing any state, just push more draws into the
pipeline.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f2645229c2 ("anv: implement Wa_14016118574")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21660>
 2023-03-03 09:34:16 +00:00
Lionel Landwerlin d82e8e01c8 anv: fixup condition for Wa_14016118574 
We don't want the WA to kick-in if it's not point/line topology.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f2645229c2 ("anv: implement Wa_14016118574")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21660>
 2023-03-03 09:34:16 +00:00
Samuel Pitoiset f775873f81 ci: uprev CTS to 1.3.5.0 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21390>
 2023-03-03 08:23:21 +00:00
José Roberto de Souza a24d93aa89 intel/dev: Query and compute hardware topology for Xe 
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21368>
 2023-03-03 05:25:35 +00:00
José Roberto de Souza 4b81a80f55 intel/dev: Implement Xe functions to handle hwconfig 
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21368>
 2023-03-03 05:25:35 +00:00
José Roberto de Souza bc24091c52 intel/dev: Implement Xe functions to fill intel_device_info 
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21368>
 2023-03-03 05:25:35 +00:00
José Roberto de Souza 545d7e07ca intel/dev: Add INTEL_KMD_TYPE_XE 
As mentioned in the previous patch, if intel-xe-kmd is disabled
it will fail to detected in run time but it will still compile all
Xe files.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21368>
 2023-03-03 05:25:35 +00:00
Mark Janes 276f4a9d8c intel/dev: Print required workarounds with intel_dev_info 
With the addition of workarounds, the output from this tool is more
verbose than some users will want.  Provide optional parameters for
enabling hwconfig and workaround details.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21639>
 2023-03-03 04:55:08 +00:00
Faith Ekstrand 9a4641cf6b intel/nir: Limit unaligned loads to vec4 
This probably doesn't affect Vulkan or GL because they can't have
anything bigger than a vec4 anyway unless it's a u64vec4 and those have
to be at least 8B aligned.  This may affect CL apps if they use
__attribute__((packed)) on something with big vectors, depending on how
LLVM decides to translate that.

Fixes: f8aa83f0c8 ("intel/nir: Use nir_lower_mem_access_bit_sizes()")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21524>
 2023-03-03 02:00:39 +00:00
Faith Ekstrand eb9a56b6ca nir: Rename nir_mem_access_size_align::align_mul to align 
It's a simple alignment so calling it align_mul is a bit misleading.

Suggested-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21524>
 2023-03-03 02:00:39 +00:00
Faith Ekstrand ca4d73ba36 nir: Add a combined alignment helper 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@colllabora.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21524>
 2023-03-03 02:00:39 +00:00
Faith Ekstrand 116a851264 nir: Add mode filtering to lower_mem_access_bit_sizes 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21524>
 2023-03-03 02:00:39 +00:00
Lionel Landwerlin f1e4d5c910 anv: fix scratch buffer reloc in 3DSTATE_HS 
We need to have the scratch buffer added to the pipeline BO tracking
list, so it's added to the batch buffer and finally to the execbuffer
list. Otherwise we pagefault (or read the default scratch page on
i915).

Fixes
dEQP-VK.subgroups.ballot_broadcast.graphics.subgroupbroadcast_u16vec4
on CI (and probably other tests).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2028f1caa3 ("anv: emit 3DSTATE_HS in cmd_buffer_flush_gfx_state")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21653>
 2023-03-02 17:51:41 +00:00
Väinö Mäkelä e509afacf3 hasvk: Disable non-zero fast clears for 8xMSAA images 
Using texelFetch to read samples from an 8xMSAA fast cleared image on
Haswell can read transparent black pixels around triangles from where
there should be none. This issue isn't present when using sample
shading, resolving the image using vkCmdResolveImage or in a copy the
image. The easiest way to fix this is by just disabling non-zero fast
clears for 8xMSAA images.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7587

Cc: mesa-stable
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21444>
 2023-03-02 17:26:09 +00:00
Lionel Landwerlin c914e70bce anv/hasvk: speed up null image/view descriptor writes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Chuansheng Liu <chuansheng.liu@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21642>
 2023-03-02 15:03:25 +00:00
Tapani Pälli 207eb94445 intel/compiler: add comment about workaround on simd width 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21619>
 2023-03-02 14:06:36 +00:00