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186467 Commits

Author SHA1 Message Date
David Rosca 9d477fae68 radv/video: Remove dt_field_mode handling code 
This would be used for decoding into interlaced buffer, but since
that's not support it is a dead code.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32069>
 2025-01-03 01:28:07 +00:00
David Rosca ca0cb78869 radv/video: Use correct array index for decode target and DPB images 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12057
Cc: mesa-stable
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32069>
 2025-01-03 01:28:07 +00:00
David Rosca 8dabb480e2 radv/video: Fix DPB tier2 surface params 
Fixes: 3e2c768aa8 ("radv/vcn: enable dynamic dpb tier 2 for h264/h265 on navi21+")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32069>
 2025-01-03 01:28:07 +00:00
Dylan Baker d9429229cf intel/tests: Fix missing assignment of error condition 
Coverity notices that `err` might be used uninitialized, which is true
as we don't assign the value we want to check! Fix that assignment so
the EXPECT_EQ macro does what we expect.

CID: 1635272
Fixes: 6b931a68c7 ("intel/common: Implement Xe KMD in mi_builder tests")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32849>
 2025-01-03 00:53:49 +00:00
Dylan Baker 5420fc16d6 intel/tests: Fix coverity warning about possibly leaked memory 
If the assert were to fail the memory would leak, which is pretty
harmless in a unit test, but the fix is trivial.

CID: 1635429
Fixes: 6b931a68c7 ("intel/common: Implement Xe KMD in mi_builder tests")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32849>
 2025-01-03 00:53:49 +00:00
Erik Faye-Lund 51a2f70e5e panvk/ci: drop needless envvar 
We no longer need this opt-in for v10 GPUs, so let's drop it.

Fixes: 976eb6825e ("panvk: do not require opt-in for panvk on v10")
Acked-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32825>
 2025-01-02 23:08:27 +00:00
Mel Henning c273ada502 compiler/rust/bitset: Test next_unset() 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:48 +00:00
Mel Henning 2bcb950865 compiler/rust/bitset: Don't expose words 
This encapsulates the bitset's word size and word count, which means
consumers no longer need to be careful about word count. Users of the old
apis for writing expressions on bit sets should migrate to the new expression
API.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:48 +00:00
Mel Henning 4e3ba67063 nak: Migrate liveness to new bitset expression api 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:48 +00:00
Mel Henning 86e5cb7c2d compiler/rust/bitset: Take a stream in union_with 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:48 +00:00
Mel Henning 47da213e19 compiler/rust/bitset: Add a lazy expression API 
The new api doesn't require allocations for intermediate values in
expressions. It also has tests, which is nice because eg. the previous
implementation of the `&` operator was broken.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:48 +00:00
Mel Henning e52b2ee4b9 compiler/rust/bitset: Remove impl Not 
This is extremely difficult to use correctly for bitsets of
different sizes. Also, nobody uses it. Remove the footgun.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:48 +00:00
Mel Henning 8ec885da1d compiler/rust/bitset: impl FromIterator 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:48 +00:00
Mel Henning de47702dde compiler/rust/bitset: Make BitSetIter private 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:47 +00:00
Mel Henning 06cd3c7fa3 compiler/rust/bitset: Removed unused start param 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:47 +00:00
Mel Henning 6ba317bd8c compiler/rust/bitset: Add a basic test 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:47 +00:00
Mel Henning 3b341366a6 compiler/rust: Fix running tests 
`ninja test` wasn't actually running these tests, I guess because the
target name was duplicated in meson. Fix this so the tests actually run.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:47 +00:00
Mel Henning 639211dea8 compiler/rust/bitset: Fix the bitset iterator 
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32812>
 2025-01-02 20:52:47 +00:00
Antonio Ospite 578fb242f9 ci/android: add ci rules to test venus on Android 
Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30895>
 2025-01-02 19:31:41 +00:00
Antonio Ospite 610fc8cd13 ci/android: add ci rules to test llvmpipe on Android 
For future reference add some disabled rules to for running tests using
llvmpipe on Android, and for that to work also add
deqp-android-llvmpipe.toml

Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30895>
 2025-01-02 19:31:41 +00:00
Antonio Ospite d93626a84b ci/android: use a /data/deqp subdirectory on guest to store dEQP files 
Use a /data/deqp subdirectory on the Android guest to store dEQP files,
so that the files are not mixed with unrelated ones under /data

Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30895>
 2025-01-02 19:31:41 +00:00
Antonio Ospite 5bd669e076 ci/android: don't copy the DRI drivers which are not needed anymore 
For the current tests the DRI drivers do not seem to be needed on
Android, so remove the ANDROID_DRIVER variable and stop copying the DRI
libraries to the guest file system, only copy libgallium_dri.so which is
really needed.

While at it, also copy libGLESv1_CM.so and libGLESv2.so

Reviewed-by: Eric Engestrom <None>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30895>
 2025-01-02 19:31:41 +00:00
Rob Clark a933acdfd7 tu: Align lrz height to 32 
See previous commit.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32786>
 2025-01-02 18:55:49 +00:00
Rob Clark 3759889846 freedreno/a6xx: Align lrz height to 32 
Emperically this seems to be required when doing a linear clear of the
tiled LRZ buffer (because height needs to match aligned height for a
linear clear to dtrt).

Issue could be reproduced with nolrzfc and:

  glmark2 -s 1472x920 --visual-config samples=2 -b terrain

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12336
Fixes: a127a78548 ("freedreno: Re-enable LRZ for a7xx")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32786>
 2025-01-02 18:55:49 +00:00
Rob Clark f7af64cece freedreno/a6xx: Add nolrzfc debug option 
Add option to disable lrz fast-clear.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32786>
 2025-01-02 18:55:49 +00:00
Rob Clark 746f41688c freedreno/a6xx: Align lrz setup with tu 
No functional change.  It's just easier to compare if there aren't
cosmetic differences.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32786>
 2025-01-02 18:55:49 +00:00
Caio Oliveira e1aebf8a0c intel/brw: Remove 'fs' prefix from passes and related functions 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32813>
 2025-01-02 18:11:05 +00:00
Caio Oliveira 25384dccc0 intel/brw: Remove 'fs' prefix from passes filenames 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32813>
 2025-01-02 18:11:05 +00:00
Marek Olšák e772a4f3fd radeonsi: use nir_opt_move 
TOTALS FROM AFFECTED SHADERS (35064/58359) - ACO
  Spilled SGPRs: 446 -> 402 (-9.87 %)
  Code Size: 56827400 -> 56672948 (-0.27 %) bytes
  Max Waves: 548680 -> 549799 (0.20 %)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:56 +00:00
Marek Olšák f114a18501 radeonsi: use nir_opt_sink 
TOTALS FROM AFFECTED SHADERS (29673/58359) - ACO
  Spilled SGPRs: 860 -> 446 (-48.14 %)
  Code Size: 41681748 -> 41337964 (-0.82 %) bytes
  Max Waves: 465904 -> 466036 (0.03 %)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:56 +00:00
Marek Olšák 7fbca998b1 amd: optimize atomics before lowering intrinsics 
ac_nir_lower_intrinsics_to_args will lower most system values.

I have to keep the divergence analysis in ACO, otherwise it goes haywire.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:56 +00:00
Marek Olšák d30c55abf1 radeonsi: lower sysval intrinsics as late as possible 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:56 +00:00
Marek Olšák 5dd9171765 ac/nir: set upper ranges for range analysis while lowering system values 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 0d5b03f2b9 ac/nir: split local_invocation_ids to 3 separate VGPR inputs 
so that we can set the upper range per VGPR.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 65d241c947 ac/nir: set arg_upper_bound_u32 for vs_rel_patch_id 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 1d9fbe5387 ac/nir: add helper ac_nir_load_arg_upper_bound 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák cfeaa45dc6 ac/nir: clean up ac_nir_lower_indirect_derefs 
IO variables can't occur here anymore.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák ae22da2ff8 ac/nir: lower more loads in ac_nir_lower_intrinsics_to_args instead of drivers 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák dc8a40ff3e ac/llvm: remove already lowered cases 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák ceb6f8fc32 amd: lower load_tess_rel_patch_id/primitive_id/tess_coord and overwrite.. in NIR 
The overwrite instruction complicates it a little, which is why these
intrinsics are lowered together.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 61bfb4fa06 amd: lower load_subgroup_invocation in NIR 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák e69f47faee amd: lower load_local_invocation_index in NIR 
This is the last intrinsic that needed the LS VGPR bug workaround in ACO
and ac_nir_to_llvm.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 433ca6ba38 ac/nir: extract a load_subgroup_id lowered helper 
this will be used in the next commit

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 85ce311a36 radeonsi: don't return 0 from si_get_max_workgroup_size 
the next commit needs this

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 342dcbdc8b amd: lower load_vertex_id/instance_id and overwrite_vs_arguments in NIR 
2 things complicate this:
- overwrite_vs_arguments_amd
- the LS VGPR bug workaround

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 66dd70adc5 amd: lower load_gs_wave_id_amd in NIR 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 923f59c971 amd: lower load_barycentric_at_offset in NIR 
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 16ab05fad1 amd: lower load_barycentric_pixel/centroid/sample in NIR 
radeonsi needs to preserve interp_mode in the arg load.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák a15e733a81 ac,radeonsi: move load_vector_arg flags to common code 
This will be needed by lowering of barycentrics.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00
Marek Olšák 7e83f6ca8b amd: lower load_front_face in NIR 
radeonsi must do this after si_lower_nir_abi, which optimizes front_face,
but doesn't lower it.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
 2025-01-02 17:36:55 +00:00