ac/nir: clean up ac_nir_lower_indirect_derefs
IO variables can't occur here anymore. Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
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+5
-29
@@ -1092,40 +1092,16 @@ ac_nir_lower_indirect_derefs(nir_shader *shader,
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{
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bool progress = false;
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/* TODO: Don't lower convergent VGPR indexing because the hw can do it. */
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/* Lower large variables to scratch first so that we won't bloat the
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* shader by generating large if ladders for them. We later lower
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* scratch to alloca's, assuming LLVM won't generate VGPR indexing.
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* shader by generating large if ladders for them.
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*/
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NIR_PASS(progress, shader, nir_lower_vars_to_scratch, nir_var_function_temp, 256,
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glsl_get_natural_size_align_bytes, glsl_get_natural_size_align_bytes);
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/* LLVM doesn't support VGPR indexing on GFX9. */
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bool llvm_has_working_vgpr_indexing = gfx_level != GFX9;
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/* TODO: Indirect indexing of GS inputs is unimplemented.
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*
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* TCS and TES load inputs directly from LDS or offchip memory, so
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* indirect indexing is trivial.
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*/
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nir_variable_mode indirect_mask = 0;
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if (shader->info.stage == MESA_SHADER_GEOMETRY ||
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(shader->info.stage != MESA_SHADER_TESS_CTRL && shader->info.stage != MESA_SHADER_TESS_EVAL &&
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!llvm_has_working_vgpr_indexing)) {
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indirect_mask |= nir_var_shader_in;
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}
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if (!llvm_has_working_vgpr_indexing && shader->info.stage != MESA_SHADER_TESS_CTRL)
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indirect_mask |= nir_var_shader_out;
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/* TODO: We shouldn't need to do this, however LLVM isn't currently
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* smart enough to handle indirects without causing excess spilling
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* causing the gpu to hang.
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*
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* See the following thread for more details of the problem:
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* https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
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*/
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indirect_mask |= nir_var_function_temp;
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NIR_PASS(progress, shader, nir_lower_indirect_derefs, indirect_mask, UINT32_MAX);
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/* This lowers indirect indexing to if-else ladders. */
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NIR_PASS(progress, shader, nir_lower_indirect_derefs, nir_var_function_temp, UINT32_MAX);
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return progress;
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}
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