amd: lower load_front_face in NIR

radeonsi must do this after si_lower_nir_abi, which optimizes front_face,
but doesn't lower it.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>

src/amd/common/ac_nir.c

@@ -269,6 +269,12 @@ lower_intrinsic_to_arg(nir_builder *b, nir_instr *instr, void *state)
       replacement = nir_ior(b, x_rate, y_rate);
       break;
    }
+   case nir_intrinsic_load_front_face:
+      replacement = nir_fgt_imm(b, ac_nir_load_arg(b, s->args, s->args->front_face), 0);
+      break;
+   case nir_intrinsic_load_front_face_fsign:
+      replacement = ac_nir_load_arg(b, s->args, s->args->front_face);
+      break;
    default:
       return false;
    }

src/amd/compiler/aco_instruction_selection.cpp

@@ -8086,15 +8086,6 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr)
       emit_interp_center(ctx, get_ssa_temp(ctx, &instr->def), bary, pos1, pos2);
       break;
    }
-   case nir_intrinsic_load_front_face: {
-      bld.vopc(aco_opcode::v_cmp_lt_f32, Definition(get_ssa_temp(ctx, &instr->def)),
-               Operand::zero(), get_arg(ctx, ctx->args->front_face));
-      break;
-   }
-   case nir_intrinsic_load_front_face_fsign: {
-      bld.copy(Definition(get_ssa_temp(ctx, &instr->def)), get_arg(ctx, ctx->args->front_face));
-      break;
-   }
    case nir_intrinsic_load_tess_coord: visit_load_tess_coord(ctx, instr); break;
    case nir_intrinsic_load_interpolated_input: visit_load_interpolated_input(ctx, instr); break;
    case nir_intrinsic_store_output: visit_store_output(ctx, instr); break;

src/amd/compiler/aco_instruction_selection_setup.cpp

@@ -556,7 +556,6 @@ init_context(isel_context* ctx, nir_shader* shader)
                case nir_intrinsic_load_barycentric_centroid:
                case nir_intrinsic_load_barycentric_at_offset:
                case nir_intrinsic_load_interpolated_input:
-               case nir_intrinsic_load_front_face_fsign:
                case nir_intrinsic_load_local_invocation_index:
                case nir_intrinsic_load_subgroup_invocation:
                case nir_intrinsic_load_tess_coord:

src/amd/llvm/ac_nir_to_llvm.c

@@ -2932,13 +2932,6 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
       } else
          fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
       break;
-   case nir_intrinsic_load_front_face:
-      result = emit_float_cmp(&ctx->ac, LLVMRealOLT, ctx->ac.f32_0,
-                              ac_get_arg(&ctx->ac, ctx->args->front_face));
-      break;
-   case nir_intrinsic_load_front_face_fsign:
-      result = ac_get_arg(&ctx->ac, ctx->args->front_face);
-      break;
    case nir_intrinsic_load_helper_invocation:
    case nir_intrinsic_is_helper_invocation:
       result = ac_build_load_helper_invocation(&ctx->ac);

src/gallium/drivers/radeonsi/si_shader.c

@@ -2590,10 +2590,10 @@ static struct nir_shader *si_get_nir_shader(struct si_shader *shader, struct si_
       NIR_PASS_V(nir, nir_clear_shared_memory, shared_size, chunk_size);
    }
 
+   NIR_PASS(progress, nir, si_nir_lower_abi, shader, args);
    NIR_PASS(progress, nir, ac_nir_lower_intrinsics_to_args, sel->screen->info.gfx_level,
             si_select_hw_stage(nir->info.stage, key, sel->screen->info.gfx_level),
             &args->ac);
-   NIR_PASS(progress, nir, si_nir_lower_abi, shader, args);
 
    if (progress) {
       si_nir_opts(sel->screen, nir, false);
@@ -2761,8 +2761,8 @@ si_nir_generate_gs_copy_shader(struct si_screen *sscreen,
    struct si_shader_args args;
    si_init_shader_args(shader, &args, &gs_nir->info);
 
-   NIR_PASS_V(nir, ac_nir_lower_intrinsics_to_args, sscreen->info.gfx_level, AC_HW_VERTEX_SHADER, &args.ac);
    NIR_PASS_V(nir, si_nir_lower_abi, shader, &args);
+   NIR_PASS_V(nir, ac_nir_lower_intrinsics_to_args, sscreen->info.gfx_level, AC_HW_VERTEX_SHADER, &args.ac);
 
    si_nir_opts(gs_selector->screen, nir, false);