AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
149,923 Commits 1 Branch 0 Tags
08c2b9d7cbc2b60233c3d3ed411ceb9649fe5c9f
Commit Graph

149923 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Mike Blumenkrantz 08c2b9d7cb lavapipe: use util_pack_color_union() for generating clear colors 
this enables clamping for packed formats (e.g., RGB10_A2UI) where color
values may exceed the width of the component

cc: mesa-stable

fixes (zink):
KHR-GL45.direct_state_access.renderbuffers_storage*

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14911>
 2022-02-08 18:38:20 +00:00
Emma Anholt 6faaeca584 ci/freedreno: Add another unsizedArrayLength flake. 
Started appearing on Feb 1, but given that the rest of this test group
flakes, I assume it's similar.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14934>
 2022-02-08 18:04:37 +00:00
Andrii Pauk cf4de7d8ff venus: Allow usage of virtio-mmio based device 
Libdrm reports bustype as DRM_BUS_PLATFORM for virtio-mmio
based device. DRM_BUS_PCI is reported only for virtio-pci based
devices. Add possibility to use devices with DRM_BUS_PLATFORM.

Signed-off-by: Andrii Pauk <Andrii.Pauk@opensynergy.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14531>
 2022-02-08 17:53:21 +00:00
Daniel Schürmann 5e9df85b1a aco: optimize discard_if when WQM is not needed afterwards 
Totals from 11560 (8.57% of 134913) affected shaders: (GFX10.3)
CodeSize: 12092560 -> 11997652 (-0.78%)
Instrs: 2205325 -> 2181598 (-1.08%)
Latency: 15376048 -> 15356958 (-0.12%); split: -0.12%, +0.00%
InvThroughput: 3526105 -> 3525120 (-0.03%); split: -0.03%, +0.00%
Copies: 98543 -> 87601 (-11.10%)
Branches: 16919 -> 16873 (-0.27%)
PreSGPRs: 291584 -> 291532 (-0.02%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805>
 2022-02-08 16:16:07 +00:00
Daniel Schürmann 13c3137960 aco: merge block_kind_uses_[demote|discard_if] 
These serve the same purpose. The new name is
block_kind_uses_discard.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805>
 2022-02-08 16:16:07 +00:00
Daniel Schürmann e7d1c8cc5e aco: make Preserve_WQM independent from block_kind_uses_discard_if 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805>
 2022-02-08 16:16:07 +00:00
Daniel Schürmann 08b8500dfb aco: remove block_kind_discard 
This case doesn't seem to happen in practice.
No need to micro-optimize it.

This patch merges instruction selection for discard/discard_if.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805>
 2022-02-08 16:16:07 +00:00
Daniel Schürmann b67092e685 aco: emit nir_intrinsic_discard() as p_discard_if() 
This simplifies the code and emits a slightly better
sequence in some cases.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14805>
 2022-02-08 16:16:07 +00:00
Charles Baker 1895e17591 mesa: align constant/uniform uploads to driver expected alignment 
This fixed a problem for Zink where uniform buffer alignment varies by
GPU, e.g. 64 bytes for an RTX 2070 SUPER but 256 bytes for a GTX 1070
Ti.

Tested running Superposition on Windows 10 with Nvidia 1070 Ti with
496.13 driver.  Without the fix Superposition soft locks on its splash
screen.  With the fix Superposition runs through its benchmark.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14674>
 2022-02-08 15:08:21 +00:00
Charles Baker 418c77640b zink: Fix MSVC RTC in zink_get_framebuffer_imageless() 
The bit fields in zink_framebuffer_state cause a false positive with
MSVC's run-time checks enabled.  setting state.num_attachments in
zink_get_framebuffer_imageless().  Writing some bits of num_attachments
involves reading bits from layers and samples that haven't been
initialized.

Fixed by assigning to num_attachments earlier in the function.  Not
quite sure why that makes a difference but at a guess there's a
heuristic that considers assignment close to declaration as
initialization.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14566>
 2022-02-08 14:43:00 +00:00
Mike Blumenkrantz 86cb664cd8 zink: export PIPE_CAP_CULL_DISTANCE_NOCOMBINE 
fixes:
KHR-GL46.cull_distance.functional

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14878>
 2022-02-08 14:03:09 +00:00
Mike Blumenkrantz 7e9481eaac gallium: add PIPE_CAP_CULL_DISTANCE_NOCOMBINE 
for drivers where separate cull distance variables are required, this
lets them avoid having to write yet another pass to undo gallium's mangling
of shader info

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14878>
 2022-02-08 14:03:09 +00:00
Lionel Landwerlin 93a90fc85d anv: fix conditional render for vkCmdDrawIndirectByteCountEXT 
We just forgot about conditional render for this entry point.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2be89cbd82 ("anv: Implement vkCmdDrawIndirectByteCountEXT")
Tested-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14891>
 2022-02-08 13:33:38 +00:00
Lionel Landwerlin 5d3e419378 anv: enable ray queries 
Only on platforms that support it.

v3: Split out code setting up ray query shadow buffer (Caio)
    Don't forget to setup ray query globals even when no shadow buffer
    is used (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin c78be5da30 intel/fs: lower ray query intrinsics 
v2: Add helper for acceleration->root_node computation (Caio)

v3: Update comment on "done" bit (Caio)
    Remove progress bool value for impl function (Caio)
    Don't use nir_shader_instructions_pass to search the shader (Caio)

v4: Rename variable for if/else block (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 712d8fb043 intel/nir: document RT builder 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin e06f9d49bc nir/lower_shader_calls: consider relocated constants as rematerializable 
After all they're constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 0465714790 intel/nir/rt: add more helpers for ray queries 
v2: Split stack_id helper in sync/async version (Caio)
    Fixup a few bit field mistake (Caio)
    Simplify some bitfield manipulations (Caio)

v3: Remove duplicated helper (Caio)
    Simplify brw_nir_rt_set_dword_bit_at (Caio)
    Comment brw_nir_rt_query_mark_init (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin d5b994ec8a intel/nir/rt: make RT manipulation helpers helper invocations ready 
Since we need to be able to perform ray queries in helper invocations,
we need to have all the helpers properly tag their load/store
operations so that they operate in helper lanes.

v2: Switch from macros to inline functions (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin fb69fed65b intel/nir: document committed argument 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin b0624e414f intel/fs: make trivial shader complete tracing operations with missing shaders 
v2: Apply workaround only on < DG2-512-C0 & < DG2-128-B0

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 35bd19f53d intel/nir/rt: load bvh_level value off mem_hit structure 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 6d9ae6ec1e intel: add a new intrinsic to get the shader stage from bindless shaders 
We'll use this to apply ray tracing operations in our trivial return
shader based on the stage we're in.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin b8f087b0e6 nir/builder: add nir_ior_imm() helper 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin bb40e999d1 intel/nir: use a single intel intrinsic to deal with ray traversal 
In the future we'll want to reuse this intrinsic to deal with ray
queries. Ray queries will use a different global pointer and
programmatically change the control/level arguments of the trace send
instruction.

v2: Comment on barrier after sync trace instruction (Caio)
    Generalize lsc helper (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 39f6cd5d79 intel/nir: fix shader call lowering 
We're replacing a generic instruction by an intel specific one, we
need to remove the previous instruction.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c5a42e4010 ("intel/fs: fix shader call lowering pass")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 2665595244 intel/fs: limit FS dispatch to SIMD16 when using ray queries 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 57eed6698b intel/compiler: tracker number of ray queries in prog_data 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:25 +00:00
Lionel Landwerlin 9b366243ed intel/fs: load more fields from BVH instance leafs 
v2: Fixup mask (Caio)
    Drop old comment (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin c89024e446 intel/fs: don't set allow_sample_mask for CS intrinsics 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 77486db867 ("intel/fs: Disable sample mask predication for scratch stores")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 9d22f8ed23 intel/fs: add support for ACCESS_ENABLE_HELPER 
v2: Factor out fragment shader masking on send messages (Caio)
    Update comments (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin c199f44d17 intel/fs: name sources for A64 opcodes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 23ce94ff7e intel/nir/rt: add a new number of SIMD lanes per DSS helper 
v2: Add prefix brw_nir_rt (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 61c9b7a82e intel/fs: add support for Eu/Thread/Lane id 
This index will be used for accessing ray query data in memory.

v2: Drop a MOV (Caio)

v3: Rework back code emission (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 3dabe93257 intel/fs: rework dss_id opcode into generic opcode 
We'll want different types of IDs based on topology. Let's make this
more flexible and also move the bit shifting code a layer above where
it's easier to do bitshifting operations, especially if you need to
stash things into temporary registers.

v2: Keep previous comment.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin 4deb8e86df nir: change intel dss_id intrinsic to topology_id 
This will allow to reuse the same intrinsic for various topology based
ID.

v2: fix intrinsic comment (Caio)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13719>
 2022-02-08 12:55:24 +00:00
Lionel Landwerlin fdb74a77d2 intel/ds: fix compilation with perfetto 
Forgot to test with perfetto...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9da3d714b8 ("anv: add dynamic rendering traces")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5992
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Tested-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14914>
 2022-02-08 12:29:21 +00:00
Dylan Baker a52e4871fe meson: add radv to meson devenv 
I either rebased this out of the original PR, just failed to commit it
and then reset it.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14879>
 2022-02-07 21:22:12 -08:00
Mike Blumenkrantz 8335fdfeaf vk/sync: add asserts for timeline semaphore count matching 
spec requires that the number of timeline waits/signals matches the
base number of waits/signals if there are any timeline semaphores
being processed by the submit, so asserting here is in line with what
validation will yield

failure to match these will also hang every driver I've tested, so asserting
here potentially saves some people their desktop session

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14741>
 2022-02-08 04:09:13 +00:00
Mike Blumenkrantz 388f23eabe zink: min/max blit region in coverage functions 
these regions might not have the coords in the correct order, which will
cause them to fail intersection tests, resulting in clears that are never
applied

cc: mesa-stable

fixes:
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_all_buffer_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_depth_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_color_and_stencil_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_linear_filter_color_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_magnifying_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_minifying_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_missing_buffers_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_nearest_filter_color_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_dimensions_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_height_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_negative_width_blit
GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_scissor_blit

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14867>
 2022-02-08 03:42:01 +00:00
Mike Blumenkrantz b656ab75a6 zink: reject invalid draws 
cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14859>
 2022-02-08 03:29:45 +00:00
Mike Blumenkrantz e38c13830f zink: fix PIPE_CAP_TGSI_BALLOT export conditional 
this requires VK_EXT_shader_subgroup_ballot

cc: mesa-stable

fixes (lavapipe):
KHR-GL46.shader_ballot_tests.ShaderBallotAvailability
KHR-GL46.shader_ballot_tests.ShaderBallotFunctionRead

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14858>
 2022-02-08 03:16:06 +00:00
Mike Blumenkrantz 8907964dcd zink: export PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED 
this is supported and has been for a while

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14858>
 2022-02-08 03:16:06 +00:00
Pierre-Eric Pelloux-Prayer 413bf889e7 radeonsi/blit: relax conditions to use sdma copy for prime buffers 
We don't need to check if it's imported: PIPE_BIND_DRI_PRIME is enough.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14615>
 2022-02-08 00:13:07 +00:00
Pierre-Eric Pelloux-Prayer 3b27ad1504 radeonsi: create prime buffers as uncached 
8791e831b1 marked imported prime buffers as uncached (useful when prime
buffer is allocated by the display GPU), but they should also be created
as uncached (useful when allocated by the render GPU).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14615>
 2022-02-08 00:13:07 +00:00
Pierre-Eric Pelloux-Prayer 18c38bf78f gallium: rename PIPE_BIND_DRI_PRIME 
The new name PIPE_BIND_PRIME_BLIT_DST is more precise.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14615>
 2022-02-08 00:13:07 +00:00
Pierre-Eric Pelloux-Prayer 42c149e36b gallium/dri: add missing PIPE_BIND_DRI_PRIME handling 
e9c3dbd046 added PIPE_BIND_DRI_PRIME but it was only set when
importing a prime buffer.

This commit adds handling of this flag in the other codepath = the
one where the prime buffer is allocated by the render GPU.

With this change PIPE_BIND_DRI_PRIME is still only set for the
render GPU - the display GPU will never see this flag; a future
commit will rename it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14615>
 2022-02-08 00:13:07 +00:00
Kenneth Graunke 3926be368e ci/iris: Mark qbo tests as flakes 
These appear to have some kind of race condition and usually fail,
but sometimes pass.  We had already attempted to mark them as flakes
on amly, but need to mark them as flakes on KBL+ too.

See https://gitlab.freedesktop.org/mesa/mesa/-/jobs/18522605 and
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/18527737 where these
unexpectedly passed on KBL, and also where the top-level test not
being caught by the regex led to failures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14916>
 2022-02-07 14:30:52 -08:00
Zoltán Böszörményi df1751a2bb crocus: Enable compat profile the same way as core profile 
Signed-off-by: Zoltán Böszörményi <zboszor@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11756>
 2022-02-07 19:41:44 +00:00
Kenneth Graunke 604d97671b iris: Add support for flushing the blitter (hackily) 
To flush the blitter, we need to use MI_FLUSH_DW rather than the usual
PIPE_CONTROL we use on the 3D engine.  Most of our code is set up to
suggest flushes via PIPE_CONTROL commands, however, so we hackily just
emit MI_FLUSH_DW when they ask for any kind of PIPE_CONTROL flush.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14912>
 2022-02-07 09:50:01 -08:00