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Author SHA1 Message Date
Lionel Landwerlin 00eefdcd03 hasvk: stop advertising Vk 1.3 on non-softpin 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:45 +00:00
Lionel Landwerlin daf108ee14 hasvk: remove entrypoints for gfx9+ 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:45 +00:00
Lionel Landwerlin 50013ca9a5 intel: add a hasvk vulkan driver 
This new driver is a copy of the current Anv code, it will only load
on gfx7/8 platforms though.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:45 +00:00
Igor Torrente a0b08e2858 radv: anv: Use the new vk_clock_gettime and vk_time_max_deviation 
functions

Removes the duplicated code and start using the new common
code.

v2: split anv/radv parts to separate commits

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18281>
 2022-09-02 00:54:24 +00:00
Jason Ekstrand 44ab076fea vulkan: Add a vk_command_buffer_ops struct 
This is the standard pattern in the kernel for providing vfunc tables
for C objects.  We're using it in the pipeline cache code but we're
about to start adding more stuff and so it really helps if we have it
for command buffers as well.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>
 2022-09-01 20:17:25 +00:00
Jason Ekstrand 5c143b132a vulkan: Re-order arguments to vk_command_buffer_init 
Most other init functions follow the Vulkan API convention of putting
the parent object first.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18324>
 2022-09-01 20:17:25 +00:00
Emma Anholt 5f66a927ec gallium,glsl: Delete PIPE_CAP_VERTEXID_NOBASE and lower_vertex_id. 
Every driver uses the nir_lower_system_values path now.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18327>
 2022-08-31 22:57:03 +00:00
Jason Ekstrand ae57628dd5 anv: Drop anv_pipeline::use_primitive_replication 
Instead of this fragile use_primitive_replication bit which we set
differently depending on whether or not we pulled the shader out of the
cache, compute and use the information up-front during the compile and
then always fetch it from the vue_map after that.  This way, regardless
of whether the shader comes from the cache or not, we have the same flow
and there are no inconsistencies.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17602>
 2022-08-31 02:00:18 +00:00
Jason Ekstrand f1768f5640 intel/compiler: Store the number of position slots in the VUE map 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17602>
 2022-08-31 02:00:18 +00:00
Jason Ekstrand 30251aaca2 anv: Stop looking at the pipeline in multiview lowering 
Passing all the data we need in directly avoids issues where we might
forget what is and isn't set on the pipeline object at the time the
shader call happens.  This will be especially important once we start
splitting things up for pipeline libraries.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17602>
 2022-08-31 02:00:18 +00:00
Jason Ekstrand 4bdbc4c93f anv: Decouple primitive replication check from the fragment shader 
Now that we're using nir_intrinsic_load_layer_id for ViewIndex, we can
use primitive replication even when the FS uses ViewIndex.  Also, only
check that active_stages doesn't contain anything other than VS and FS,
not that it's exactly VS | FS.  This both decouples things more and
allows primitive rplication in the depth-only case where we have no
fragment shader at all.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17602>
 2022-08-31 02:00:18 +00:00
Jason Ekstrand 08d3c0e8e1 anv: Use nir_intrinsic_load_layer_id for ViewId in fragment shaders 
Now that fragment shaders are a special case handled up-front, we can
reduce the complexity of some of the logic elsewhere in the pass.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17602>
 2022-08-31 02:00:18 +00:00
Konstantin Seurer e90fb9cb23 anv: Use the common physical device enumeration 
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17750>
 2022-08-30 19:34:47 +00:00
Rhys Perry 69ba1c4d59 nir: adjust nir_src_copy signature to take a nir_instr * 
This is almost always a nir_instr and updating the src of a nir_if will
have to work slightly differently in the future.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12910>
 2022-08-30 18:21:44 +00:00
Rhys Perry aa2d6e020b Revert "nir: Drop the unused instr arg for src/dest copy functions." 
This reverts commit c3a01841184ee8303c0c5ebe58491301622c5ad6.

Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12910>
 2022-08-30 18:21:44 +00:00
Jason Ekstrand c52d5acf15 util,intel: Pull the bit packing helpers from genxml to a common header 
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18062>
 2022-08-30 04:28:34 +00:00
Tatsuyuki Ishi e799b88449 radv,lvp,anv: Delete pre-common dispatch leftover. 
These functions are no longer used since the introduction of common
dispatch.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18284>
 2022-08-29 22:28:32 +00:00
Marcin Ślusarz 4eaecd7965 anv: disable task redistribution 
If task redistribution is enabled, then some mesh shaders read
garbage from task payload.

It may be a hardware bug, or it may be our bug. Who knows :(

This change will probably negatively affect performance of task
shader-enabled workloads on multi-slice GPUs, because mesh shaders
will be executed only on the slice where task shader was spawned.

Fixes: ef04caea9b ("anv: Implement Mesh Shading pipeline")

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16197>
 2022-08-29 17:08:13 +00:00
Marcin Ślusarz 66bc9aec65 intel/compiler: add support for non-zero base in [load|store]_shared intrins 
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17618>
 2022-08-29 12:42:40 +00:00
Kenneth Graunke d689ef7482 intel/compiler: Change dg2_plus check to devinfo->verx10 >= 125 
Less special casing and possibly more future-proof.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17990>
 2022-08-29 10:28:32 +00:00
Chia-I Wu 19b7d5284b util/perf: move u_perfetto to here 
Acked-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18260>
 2022-08-26 21:47:44 +00:00
José Roberto de Souza 1de5d2ac01 anv: Return earlier in anv_gem_get_tiling() when not supported 
Tiling set and get UAPIs has the same support level.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18251>
 2022-08-25 19:21:49 +00:00
José Roberto de Souza e9cba466ea anv: Nuke dead code 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18251>
 2022-08-25 19:21:49 +00:00
Eric Engestrom c66622de3a meson: replace manual compiler flags with meson arguments 
These would only have worked in GCC and Clang, which so far wasn't an
issue, but let's clean it up anyway.

Cc: mesa-stable
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18190>
 2022-08-24 22:13:19 +00:00
Lionel Landwerlin f242c9af76 intel/fs: bump max SIMD size for A64 atomics with LSC 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>.
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
 2022-08-24 17:51:40 +00:00
Lionel Landwerlin 407f2beb97 intel/fs: port block a64/surface messages to use LSC 
v2: Fixup block load/store on surfaces/shared-memory (Rohan)

v3: drop write specific size_written case (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
 2022-08-24 17:51:40 +00:00
Lionel Landwerlin 37b3601052 intel/fs: switch register allocation spilling to use LSC on Gfx12.5+ 
v2: drop the hardcoded inst->mlen=1 (Rohan)

v3: Move back to LOAD/STORE messages (limited to SIMD16 for LSC)

v4: Also use 4 GRFs transpose loads for fills (Curro)

v5: Reduce amount of needed register to build per lane offsets (Curro)
    Drop some now useless SIMD32 code
    Unify unspill code

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
 2022-08-24 17:51:40 +00:00
Lionel Landwerlin 3c6fa2703d intel/fs: fixup SEND validation check on overlapping src0/src1 
With the following SEND instruction :

   send(1)         nullUD          nullUD          g0UD            0x4200c504                a0.1<0>UD

This instruction although valid but somewhat nonsensical (SEND message
to write at offset contained in NULL register), triggers an error in
the validator.

The restriction is that we cannot have overlapping sources. The
validator not checking the type of register incorrectly thinks that
the null register (offset 0) is the same as g0.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
 2022-08-24 17:51:40 +00:00
Lionel Landwerlin a81ca32f96 intel/fs: remove unused opcode 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
 2022-08-24 17:51:40 +00:00
Lionel Landwerlin aa65f83203 intel/fs: switch compute push constant loads to LSC 
We're now able to load up to 8 GRFs in one send.

v2: Switch to use transpose + vector of up to 64 (Thanks Curro!)

v3: Increase parallelism by not reusing the same register for push
    constant offset (Curro)

v4: Drop dead ADD() instruction (Curro)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17555>
 2022-08-24 17:51:40 +00:00
Caio Oliveira bee2df64d2 intel/compiler: Use fs_reg helpers for GS icp_handle selection 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18221>
 2022-08-24 01:42:23 +00:00
Caio Oliveira b4aff6ab49 intel/compiler: Use fs_reg helpers for TCS icp_handle selection 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18221>
 2022-08-24 01:42:22 +00:00
Caio Oliveira a1b1fdf70d intel/compiler: Rename 8_PATCH to MULTI_PATCH 
Make it clearer we are dealing with multiple patches,
works better in constrast with SINGLE_PATCH.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18151>
 2022-08-24 00:39:57 +00:00
Caio Oliveira 7cd06249b9 intel/compiler: Remove INTEL_DEBUG=tcs8 
For Gen11 and prior, the dispatch mode for TCS was SINGLE_PATCH, and
this debug setting could be used to change it to 8_PATCH (falling back
to SINGLE_PATCH when shader couldn't be in the multi dispatch mode).
However after talking to Ken, seems this debug setting is not really
worth keeping around, so removing it.

For Gen12+ the only option is 8_PATCH, so it was always using that
dispatch mode as before.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18151>
 2022-08-24 00:39:57 +00:00
Lionel Landwerlin 3c78e94ff3 intel/fs: fixup scratch load/store handling on Gfx12.5+ 
We did not handle the operation with data size < 4. It works fine on
all other messages (global/shared). The initial commit was just too
restrictive.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 1e242785c3 ("intel/fs: Implement load/store_scratch on XeHP")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16964>
 2022-08-23 22:19:16 +00:00
Lionel Landwerlin 46a13404c0 intel/fs: fix load_scratch intrinsic 
The selection of the internal opcode to deal with load_scratch is
incorrect.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c643979228 ("intel/fs: Choose memory message type based on bit size")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16964>
 2022-08-23 22:19:16 +00:00
Caio Oliveira 0a2cfa14dd intel/compiler: Make component() work for FIXED_GRF/ARF 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18157>
 2022-08-23 19:52:38 +00:00
Francisco Jerez 6f33b22495 intel/fs: Fix horiz_offset() to handle FIXED_GRFs with non-trivial 2D regions. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18157>
 2022-08-23 19:52:38 +00:00
Eric Engestrom c535434fd9 anv: convert assert into unreachable to avoid fallthrough error 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18192>
 2022-08-23 18:37:41 +00:00
Jason Ekstrand 7077b72d60 vulkan,anv,dozen: Use VK_IMAGE_LAYOUT_ATTACHMENT_FEEDBACK_LOOP_OPTIMAL_EXT 
This has basically identical semantics to the pseudo-ext enum we were
using before.  Also, now that it's in the actual Vulkan enum, we can get
rid of all the #pragma garbage to avoid compiler warnings.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18084>
 2022-08-23 16:41:55 +00:00
Yonggang Luo 4bfde7954e intel/compiler: Fixes [-Wdeprecated-declarations] in test_eu_validate.cpp 
Warning message:
../src/intel/compiler/test_eu_validate.cpp:96:1: warning: 'InstantiateTestCase_P_IsDeprecated' is deprecated: INSTANTIATE_TEST_CASE_P is deprecated, please use INSTANTIATE_TEST_SUITE_P [-Wdeprecated-declarations]

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18203>
 2022-08-23 15:19:16 +00:00
Yonggang Luo c48f4b70e2 intel/compiler: Fixes [-Wdeprecated-declarations] in test_eu_compact.cpp 
Warning messages:
../src/intel/compiler/test_eu_compact.cpp:238:1: warning: 'InstantiateTestCase_P_IsDeprecated' is deprecated: INSTANTIATE_TEST_CASE_P is deprecated, please use INSTANTIATE_TEST_SUITE_P [-Wdeprecated-declarations]

../src/intel/compiler/test_eu_compact.cpp:256:1: warning: 'InstantiateTestCase_P_IsDeprecated' is deprecated: INSTANTIATE_TEST_CASE_P is deprecated, please use INSTANTIATE_TEST_SUITE_P [-Wdeprecated-declarations]

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18203>
 2022-08-23 15:19:16 +00:00
Caio Oliveira 9fa48eb4cf intel/compiler: Get URB handle in emit_task/mesh_intrinsic functions 
This will make convenient later to keep track of the urb
handles directly in a Task thread payload struct (to be part of
fs_visitor).

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18188>
 2022-08-23 07:39:18 -07:00
Caio Oliveira ead0cfce54 intel/compiler: Call get_mesh_urb_handle one level up in call-stack 
Call it now from a fs_visitor member functions instead of the static
ones.  This will make convenient later to keep track of the urb
handles directly in a Task thread payload struct (to be part of
fs_visitor).

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18188>
 2022-08-23 07:39:18 -07:00
sjfricke c49e328e4f anv: fix assert to build with shader cache disabled 
When setting -Dshader-cache=disabled the build fails due
no member named 'disk_cache' in 'struct anv_physical_device'

Signed-off-by: sjfricke <spencerfricke@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Fixes: 7f1e8230 ("anv: Switch to the new common pipeline cache")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18181>
 2022-08-23 13:35:46 +00:00
Lionel Landwerlin 9027c5df4c anv: remove the LOCAL_MEM allocation bit 
We always want to use local memory if possible, we'll just add the
system memory heap if the buffer needs to be host visible.

v2: Drop some usages of ANV_BO_ALLOC_LOCAL_MEM_CPU_VISIBLE

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17873>
 2022-08-23 13:19:06 +03:00
Lionel Landwerlin a254aff643 anv: prevent trying to mmap non host visible memory 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17873>
 2022-08-23 13:18:06 +03:00
Lionel Landwerlin b8c472c111 anv: fix assert in memory budget code when extension is not supported 
First we should only support the extension if we can support reporting
on all the heaps.

Second we should not run any query code if the extension is not
supported.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: fae88d8791 ("anv: make use of the new smallbar uAPI")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18153>
 2022-08-23 08:51:56 +00:00
Lionel Landwerlin 4ab38112f3 anv: fixup assertions on lowered storage formats 
With VK_FORMAT_B10G11R11_UFLOAT_PACK32 in particular, we're seeing
applications create image views with swizzle = R,G,B,0

But since the format has no alpha channel, the swizzle value for it
does not matter for the equivalence we're trying to verify.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a9edc268b9 ("anv: validate image view lowered storage formats for storage")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18081>
 2022-08-23 08:29:51 +00:00
Lionel Landwerlin d0e8f21100 anv: fix GetPipelineExecutableStatistics for ray tracing pipelines 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e104555851 ("anv: Compile ray-tracing shaders")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18013>
 2022-08-23 09:56:02 +03:00