AlexIndustrial/mesa
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
159,106 Commits 1 Branch 0 Tags
00eefdcd03c0dcff173439107d7ded490a86ff95
Commit Graph

159106 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Lionel Landwerlin 00eefdcd03 hasvk: stop advertising Vk 1.3 on non-softpin 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:45 +00:00
Lionel Landwerlin daf108ee14 hasvk: remove entrypoints for gfx9+ 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:45 +00:00
Lionel Landwerlin 50013ca9a5 intel: add a hasvk vulkan driver 
This new driver is a copy of the current Anv code, it will only load
on gfx7/8 platforms though.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:45 +00:00
Frank Binns 0013ef89bf pvr: remove image pointer from image view struct 
A pointer is also stored in the base vk_image_view struct, so we can use this
one instead.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18373>
 2022-09-02 09:21:54 +00:00
Jordan Justen 65c9a810ee intel/pci_ids: Add dg2 0x5698 pci-id 
This motherboard-down pci-id was added in kernel commit 8618b8489ba6
("drm/i915: DG2 and ATS-M device ID updates").

Ref: bspec 44477
Ref: https://patchwork.freedesktop.org/patch/msgid/20220701152231.529511-2-matthew.d.roper@intel.com
Fixes: ad565f6b70 ("intel/dev: Enable first set of DG2 PCI IDs")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18385>
 2022-09-02 07:32:12 +00:00
Samuel Pitoiset 8fed0add86 radeonsi/ci: trigger radeonsi-raven-skqp for any RADV changes 
Otherwise SKQP VK won't be run.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7120
Co-authored-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18316>
 2022-09-02 07:05:57 +00:00
Jordan Justen 91fec2657a intel/pci_ids: Update DG2 device names 
Ref: bspec 44477
Ref: https://www.intel.com/content/www/us/en/products/details/discrete-gpus/arc/arc-a-series.html
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18303>
 2022-09-02 05:58:09 +00:00
Jordan Justen 9283ffec14 intel/pci_ids: Update ATS-M device names 
Ref: bspec 44477
Ref: https://www.intel.com/content/www/us/en/products/details/discrete-gpus/data-center-gpu/flex-series/products.html
Cc: mesa-stable
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18303>
 2022-09-02 05:58:09 +00:00
pal1000 f23dbcd642 meson: Only draw with llvm depends on native directly 
Tests, softpipe or AMD drivers don't depend on it directly

Fixes: 3955dd07 ("meson/gallium: Add an option to not use LLVM for gallium draw module")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6817

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17675>
 2022-09-02 03:24:20 +00:00
Yonggang Luo c59e913e91 ci/fedora: Re-enable vulkan-layers=device-select,overlay 
Fixes: ace13203f3 ("ci: remove broken device-select-layer from build")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>
 2022-09-02 02:49:55 +00:00
Yonggang Luo 89772d726f ci: Add debian-clang-release build pipeline 
As the default build type is debug according to
.gitlab-ci/meson/build.sh, the specified line is:
-D buildtype=${BUILDTYPE:-debug}

So we use release for building optimized version for testing
if the compiler optimization are fine.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>
 2022-09-02 02:49:55 +00:00
Yonggang Luo 599be8326b ci: Enable all possible meson build options for clang 
By doing this to makes more code be compiled with clang and guarded by bot

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>
 2022-09-02 02:49:55 +00:00
Yonggang Luo c6979d97e4 ci: Enable GALLIUM_DUMP_CPU=true only in the clang job 
This is used to show the cpu caps when running unit tests.
As clang have optimization bug about util_get_cpu_caps before, so
we monitor it by using GALLIUM_DUMP_CPU=true

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>
 2022-09-02 02:49:55 +00:00
Yonggang Luo 5adf2702a9 ci: EXTRA_OPTIONS -> EXTRA_OPTION for debian-clang 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18044>
 2022-09-02 02:49:55 +00:00
Jose Fonseca d43c5b1d19 util: Add macro util_get_cpu_caps in u_cpu_detect.c for avoid accidentally call it in u_cpu_detect.c 
Signed-off-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo 40541e3479 docs: document LP_NATIVE_VECTOR_WIDTH GALLIUM_OVERRIDE_CPU_CAPS GALLIUM_NOSSE LP_FORCE_SSE2 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo 2918856014 llvmpipe: Enable avx512 support in llvm 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo f92cadccc6 llvmpipe: Always using util_get_cpu_caps to get cpu caps for llvm on x86 
As we can override cpu features with environment variables, so always using util_get_cpu_caps
instead llvm::sys::getHostCPUFeatures to get cpu features is a better option

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo 0244b1858f util: add support for detecting avx512 vector bit size 
Default to 256 until we're confident llvmpipe with 512 is
as correct and not slower than 256

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo d240fb150f util: Move the detect of max_vector_bits into u_cpu_detect.c 
has_avx2 implies has_avx, so have no need check then both

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo 33b29ecdc9 util: Add ssse3 and avx cpu caps override option 
llvmpipe can use these options to testing ssse3 and avx on cpus that support for avx512

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo 5b18b46cfe util: Refactoring check_cpu_caps_override out 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo 1c861a18d7 meson: bump the minimal required llvm version to 5.0.0 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Yonggang Luo f47ca35077 llvmpipe: Remove llvm version guard LLVM_VERSION_MAJOR <=> 4 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17813>
 2022-09-02 01:51:42 +00:00
Igor Torrente 1ebfa00bc5 venus: Fix dEQP-VK.pipeline.timestamp.calibrated.host_domain_test failure 
The current implementation is getting its clock value from the host
and this value is not guaranteed to be the same as the VM guest.

This commit implements the CLOCK_MONOTONIC[_RAW] natively.

Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18281>
 2022-09-02 00:54:24 +00:00
Igor Torrente a0b08e2858 radv: anv: Use the new vk_clock_gettime and vk_time_max_deviation 
functions

Removes the duplicated code and start using the new common
code.

v2: split anv/radv parts to separate commits

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18281>
 2022-09-02 00:54:24 +00:00
Igor Torrente 8c73b37e59 vulkan: Add vk_clock_gettime and vk_time_max_deviation 
These two new function are based on {anv,radv}_clock_gettime
and some other common code between radv and anv.

These new functions allow these drivers to share code and
more drivers can use it in the future.

v2: Drop the anv/radv changes in this commit (Yiwei Zhang)
v3: Add #ifndef _WIN32

Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> (v1)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18281>
 2022-09-02 00:54:24 +00:00
Chia-I Wu fe607547dc freedreno: get cpu timestamp again after FD_TIMESTAMP 
Same as commit 91a0411d2a ("turnip: improve perfetto sync_timestamp"),
but for freedreno.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18379>
 2022-09-02 00:37:17 +00:00
Mike Blumenkrantz 6d668cb34d vulkan: initialize a variable 
../src/vulkan/runtime/vk_fence.c: In function ‘vk_common_CreateFence’:
../src/vulkan/runtime/vk_fence.c:160:12: warning: ‘fence’ may be used uninitialized [-Wmaybe-uninitialized]
  160 |    *pFence = vk_fence_to_handle(fence);
      |    ~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~
../src/vulkan/runtime/vk_fence.c:154:21: note: ‘fence’ was declared here
  154 |    struct vk_fence *fence;

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18119>
 2022-09-02 00:13:27 +00:00
Mike Blumenkrantz da1a3ed2ea zink: don't emit illegal interpolation 
this is not valid for vertex inputs or fragment outputs

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18365>
 2022-09-01 23:49:47 +00:00
Mike Blumenkrantz fe05daeea7 zink: don't set MUTABLE by default 
this is only used by texture views, so use the same mechanism as STORAGE
to add the flag only as-needed

the mutable flag must be set before create_ivci is called for the imageview,
so zink_resource_object_init_mutable() is moved out to the callers of
zink_get_surface instead of being conveniently located in that function

fixes #7174

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>
 2022-09-01 23:27:28 +00:00
Mike Blumenkrantz 64aaabffdc zink: avoid needing mutable for z/s sampling 
the aspect flags should be sufficient to determine which component the
imageview is created for, which means this can avoid changing the format
here to retain the immutable format

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>
 2022-09-01 23:27:28 +00:00
Mike Blumenkrantz cd00a36d47 zink: only add srgb mutable for images with modifiers 
these are supposed to be for dmabuf handling, so checking for mutable
swapchain is both pointless and wrong

Fixes: 28ee911ad6 ("zink: handle mutable swapchain images with dmabuf")

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>
 2022-09-01 23:27:28 +00:00
Mike Blumenkrantz 3ad58642bf zink: store VkImageViewUsageCreateInfo for surface creation 
this otherwise breaks surface rebinds if used since the pointer
will be a garbage stack value

cc: mesa-stable

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>
 2022-09-01 23:27:28 +00:00
Mike Blumenkrantz d9b8f8d46c zink: explicitly use unsigned types for bit shifts 
fixes some ubsan errors

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18358>
 2022-09-01 23:27:28 +00:00
Emma Anholt 08548650bd turnip: Enable lowering of mediump temps/CS shared to 16-bit. 
In Aztec Ruins, we end up storing some big shared-mem arrays as 16-bit,
cutting shared mem size in half across many shaders while also reducing
conversions.  gfxbench vk-5-normal perf +0.364983% +/- 0.189764% (n=4).

fossil-db:
Totals from 448 (2.99% of 14988) affected shaders:
MaxWaves: 6154 -> 6390 (+3.83%); split: +3.96%, -0.13%
Instrs: 174554 -> 165045 (-5.45%); split: -6.45%, +1.01%
CodeSize: 364224 -> 345558 (-5.12%); split: -6.03%, +0.90%
NOPs: 48224 -> 48024 (-0.41%); split: -3.33%, +2.91%
MOVs: 6985 -> 6104 (-12.61%); split: -19.11%, +6.50%
Full: 4577 -> 4101 (-10.40%); split: -11.08%, +0.68%
(ss): 3428 -> 3335 (-2.71%); split: -4.17%, +1.46%
(sy): 1250 -> 1205 (-3.60%); split: -4.72%, +1.12%
(ss)-stall: 14695 -> 14528 (-1.14%); split: -2.25%, +1.12%
(sy)-stall: 19565 -> 17998 (-8.01%); split: -9.55%, +1.54%
STPs: 1086 -> 870 (-19.89%)
LDPs: 162 -> 108 (-33.33%)
Cat0: 51400 -> 51120 (-0.54%); split: -3.31%, +2.76%
Cat1: 16861 -> 14688 (-12.89%); split: -18.18%, +5.30%
Cat2: 71161 -> 68454 (-3.80%); split: -4.52%, +0.72%
Cat3: 29572 -> 25306 (-14.43%); split: -14.49%, +0.06%
Cat4: 3128 -> 3131 (+0.10%)
Cat5: 1502 -> 1506 (+0.27%)
Cat6: 840 -> 750 (-10.71%)

aztec ruins is a big winner with the ldp/stp reductions.  summoners_war
racks up an astounding 41% reduction in instructions and +15% max_waves.
Most affected apps show a minor win in instrs, with
fallout_shelter_online, and aztec ruins on ANGLE taking minor hits.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18259>
 2022-09-01 22:39:39 +00:00
Emma Anholt e1588cdf9e spirv: Mark phis as mediump instead of directly lowering them to 16 bit. 
This reverts commit 6f25d45877, replacing it
with GLSL_PRECISION_MEDIUM.  The previous commit ended up not being the
right approach, as it affected only nir vars for spirv phis and not other
nir vars, and we want a tool that does both.  The new
nir_lower_mediump_vars pass can do that for you.

No fossil-db change for my angle fossils run on radv.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18259>
 2022-09-01 22:39:39 +00:00
Emma Anholt 0cee5f3918 nir: Add a pass to lower mediump temps and shared mem. 
SPIRV and GLSL are reasonable at converting ALU ops to mediump, but
variable storage would be wrapped in a 2f32/2mp on store/load, and if
nir_vars_to_ssa doesn't make that storage go away then you'd have extra
conversions.  For compute shader shared mem, you'd waste memory too.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18259>
 2022-09-01 22:39:39 +00:00
Alyssa Rosenzweig 65c00ba7cb ail: Add unit tests for miptree layouts 
The equations for calculating miptree offsets are complicated,
nonobvious, and full of subtle footguns. Worse, the driver doesn't
control the offsets -- it must simply agree with the offsets
implicitly calculated in the hardware. The CTS doesn't adequately
exercise all the corner cases. Make sure we have unit tests that do.

The tests themselves are generated by instrumenting agxdecode to scan
GPU memory after uploading test patterns in a variety of layout with a
Metal application.

Thank you to Asahi Lina and Dougall Johnson for the reverse-engineering
that led to this. The tests selected here are a subset of those used for
the reverse-engineering. The full set may be found in Lina's tilecalc
repo:

   https://github.com/asahilina/tilecalc

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig 1f89e67883 asahi: Rename our fake twiddled DRM modifier 
To account for non-64x64 tile sizes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig 4ed9843a26 asahi: Advertise ASTC formats 
Now that we have layout and tiling code that can handle block-compressed
formats, including the non-square blocks found with some ASTC formats,
we can advertise ASTC formats. Passes dEQP-GLES3.*astc* which
exercises everything here. (These tests passed before by decompressing
the textures to RGBA8 UNORM in the frontend, but it's much more
efficient to use real ASTC textures as done here.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig c71e84b37e asahi: Advertise ETC1 
ETC2 is backwards compatible with ETC1, we just need to declare the
format mapping.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig 1044cfa49b asahi: Fix is_format_supported returns 
Gallium can test multiple binds at once, we need to return the logical
AND, not the OR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig b37b8eabd3 asahi: Handle 2-channel sRGB textures 
I'm not sure why we need to set this magic bit, but this fixes the
non-depth_component portion of
dEQP-GLES3.functional.texture.format.sized.*, e.g

dEQP-GLES3.functional.texture.format.sized.cube.srgb_rg8_pot

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig 464f59f723 ail: Rewrite tiled memcpy for correctness 
Move tiling.c into ail, using ail data structures and helpers to manage
the tiling. This fixes a staggering number of issues with the tiling
routines:

* NPOT block sizes defeatured. The hardware only supports POT block
  sizes. There's no need to handle anything else.

* Use ail to determine tile sizes, instead of the broken
  agx_select_tile_shift routine that didn't work for non-square tile
  sizes (for instance).

* Handle up to 128x128 tiles, as required by 8bpp textures.

* Handle non-square tiles. If the block size is not a multiple of 4, the
  tile size will be of the form 2n x n. This is easy with the ail_tile
  data structure, but not possible architecturally with
  agx_select_tile_shift. This is required for 16bpp and 64bpp textures.

* Express in terms of elements instead of pixels, using unit
  suffixes to make the dimensional analysis obvious. In particular this
  handles tiling of block-compressed textures by tiling the blocks
  themselves. This is required for block-compressed textures (internally handled
  like smaller 64bpp textures).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig 6ff75da8aa ail: Introduce image layout module 
Introduce ail, a small library for working with the image (and buffer)
layouts encountered with AGX hardware. Its design is inspired by isl. In
particular, ail strives to use isl unit suffixes and to represent
quantities in a canonical, API-agnostic fashion [1].

ail replaces the old miptree code (based on some ad hoc heuristics that
passed a few dEQP tests). It is based on a thorough reverse-engineering
of AGX's twiddled format, courtesy of Asahi Lina, Dougall Johnson, and
me. This corrects our handling of many common cases that were totally
wrong in the old code, leading to GPU faults.

Unlike the code, ail differentiates between pixels and elements
consistently, allowing block-compressed formats like ETC2 to be
supported correctly. These formats will be enabled later in the series.

This commit fixes Inochi2D, glmark2 -brefract and -bterrain, and who
knows what else.

ail stands for { Asahi, AGX } Image { Layout, Library } at your
convenience. ail is best served warm.

Liberal use of ail is recommended. Yum!

[1] https://docs.mesa3d.org/isl/units.html

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig 5057d6787a asahi: Fix ASTC enums 
The ASTC enum only encodes the block width/height. By contrast the
LDR/HDR/sRGB distinction is encoded as UNORM/Float and via the sRGB bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig 01323ba470 asahi: Fix bind sizes 
Otherwise we get a nonsensical count of 129 in one Metal sample. Exact
size still not known but this bounds somewhat.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig e71f8ef439 asahi: Add XML for multisampled textures 
Metal supports MSAA 2x and MSAA 4x, neither at the same time as
mipmapping. That matches the GL spec requirement.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00
Alyssa Rosenzweig c8435e4bc6 asahi: Rename 'tiled 64x64' to 'twiddled' 
To account for non-64x64 tile sizes, as well as the other forms of
tiling that may come up with compression.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18167>
 2022-09-01 22:30:48 +00:00