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ac/llvm,radeonsi: lower idiv in nir

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aco does not implement these idiv ops.

nir_lower_idiv is for idiv ops <= 32bit and ported from
llvm amdgpu, so llvm do the same.

nir_lower_divmod64 is for 64bit idiv ops.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22573>
This commit is contained in:
Qiang Yu
2023-04-15 14:35:27 +08:00
committed by Marge Bot
parent 5fa06828b4
commit f9d54b1d36
3 changed files with 7 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/amd/llvm/ac_nir_to_llvm.c
-15
View File
@@ -673,21 +673,6 @@ static bool visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
else
result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
break;
case nir_op_imod:
result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
break;
case nir_op_umod:
result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
break;
case nir_op_irem:
result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
break;
case nir_op_idiv:
result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
break;
case nir_op_udiv:
result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
break;
case nir_op_fmul:
src[0] = ac_to_float(&ctx->ac, src[0]);
src[1] = ac_to_float(&ctx->ac, src[1]);
src/gallium/drivers/radeonsi/si_get.c
+1
View File
@@ -1328,6 +1328,7 @@ void si_init_screen_get_functions(struct si_screen *sscreen)
.support_indirect_inputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL) |
BITFIELD_BIT(MESA_SHADER_TESS_EVAL),
.support_indirect_outputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL),
.lower_int64_options = nir_lower_divmod64,
};
sscreen->nir_options = nir_options;
}
src/gallium/drivers/radeonsi/si_shader.c
+6
View File
@@ -2243,6 +2243,12 @@ struct nir_shader *si_get_nir_shader(struct si_shader *shader,
progress2 = true;
}
NIR_PASS(progress2, nir, nir_opt_idiv_const, 8);
NIR_PASS(progress2, nir, nir_lower_idiv,
&(nir_lower_idiv_options){
.allow_fp16 = sel->screen->info.gfx_level >= GFX9,
});
NIR_PASS(progress2, nir, si_nir_lower_abi, shader, args);
if (progress2 || opt_offsets)