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radeonsi: bump PRIMGROUP_SIZE for some cases

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Recommended by hw people.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák
2014-08-18 23:14:34 +02:00
parent 4be7ff5567
commit f62f88274a
1 changed files with 4 additions and 1 deletions
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src/gallium/drivers/radeonsi/si_state_draw.c
+4 -1
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@@ -384,13 +384,16 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
{
struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
unsigned prim = info->mode;
unsigned primgroup_size = 64;
unsigned primgroup_size = 128; /* recommended without a GS */
/* SWITCH_ON_EOP(0) is always preferable. */
bool wd_switch_on_eop = false;
bool ia_switch_on_eop = false;
bool partial_vs_wave = false;
if (sctx->gs_shader)
primgroup_size = 64; /* recommended with a GS */
/* This is a hardware requirement. */
if ((rs && rs->line_stipple_enable) ||
(sctx->b.screen->debug_flags & DBG_SWITCH_ON_EOP)) {