radeonsi: set PARTIAL_VS_WAVE(0) when appropriate

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
This commit is contained in:
Marek Olšák
2014-08-15 22:45:10 +02:00
parent 94e474f3c3
commit 4be7ff5567
+6 -1
View File
@@ -389,6 +389,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
/* SWITCH_ON_EOP(0) is always preferable. */
bool wd_switch_on_eop = false;
bool ia_switch_on_eop = false;
bool partial_vs_wave = false;
/* This is a hardware requirement. */
if ((rs && rs->line_stipple_enable) ||
@@ -397,6 +398,10 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
wd_switch_on_eop = true;
}
if (sctx->b.streamout.streamout_enabled ||
sctx->b.streamout.prims_gen_query_enabled)
partial_vs_wave = true;
if (sctx->b.chip_class >= CIK) {
/* WD_SWITCH_ON_EOP has no effect on GPUs with less than
* 4 shader engines. Set 1 to pass the assertion below.
@@ -421,7 +426,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
}
return S_028AA8_SWITCH_ON_EOP(ia_switch_on_eop) |
S_028AA8_PARTIAL_VS_WAVE_ON(1) |
S_028AA8_PARTIAL_VS_WAVE_ON(partial_vs_wave) |
S_028AA8_PRIMGROUP_SIZE(primgroup_size - 1) |
S_028AA8_WD_SWITCH_ON_EOP(sctx->b.chip_class >= CIK ? wd_switch_on_eop : 0);
}