aco: ignore exec and literals when mitigating VALUMaskWriteHazard

LLVM ignores exec and literals don't seem to work in some cases.

fossil-db (navi31):
Totals from 2676 (3.37% of 79395) affected shaders:
Instrs: 10638979 -> 10646019 (+0.07%); split: -0.00%, +0.07%
CodeSize: 55929640 -> 55959416 (+0.05%); split: -0.00%, +0.06%
Latency: 107707408 -> 107712893 (+0.01%); split: -0.00%, +0.01%
InvThroughput: 18119843 -> 18120442 (+0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Backport-to: 24.1
Backport-to: 24.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30818>

src/amd/compiler/README-ISA.md

@@ -375,4 +375,5 @@ Triggered by:
 SALU writing then reading a SGPR that was previously used as a lane mask for a VALU.
 
 Mitigated by:
-A VALU instruction reading a SGPR or with literal, or a sa_sdst=0 wait: `s_waitcnt_depctr 0xfffe`
+A VALU instruction reading a non-exec SGPR before the SALU write, or a sa_sdst=0 wait:
+`s_waitcnt_depctr 0xfffe`

src/amd/compiler/aco_insert_NOPs.cpp

@@ -1485,7 +1485,8 @@ handle_instruction_gfx11(State& state, NOP_ctx_gfx11& ctx, aco_ptr<Instruction>&
 
          if (state.program->wave_size == 64) {
             for (Operand& op : instr->operands) {
-               if (op.isLiteral() || (!op.isConstant() && op.physReg().reg() < 128))
+               /* This should ignore exec reads */
+               if (!op.isConstant() && op.physReg().reg() < 126)
                   ctx.sgpr_read_by_valu_as_lanemask.reset();
             }
             switch (instr->opcode) {