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nvfx: fix GPU hardlocks when depth buffer is absent

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This commit is contained in:
Luca Barbieri
2010-08-19 12:58:14 +02:00
parent 6931a01222
commit ed232adc80
4 changed files with 15 additions and 5 deletions
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src/gallium/drivers/nvfx/nvfx_context.h
+1 -1
View File
@@ -56,7 +56,7 @@ struct nvfx_rasterizer_state {
struct nvfx_zsa_state {
struct pipe_depth_stencil_alpha_state pipe;
unsigned sb_len;
uint32_t sb[26];
uint32_t sb[24];
};
struct nvfx_blend_state {
src/gallium/drivers/nvfx/nvfx_state.c
+1 -3
View File
@@ -207,10 +207,8 @@ nvfx_depth_stencil_alpha_state_create(struct pipe_context *pipe,
struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso));
struct nouveau_statebuf_builder sb = sb_init(zsaso->sb);
sb_method(sb, NV34TCL_DEPTH_FUNC, 3);
sb_method(sb, NV34TCL_DEPTH_FUNC, 1);
sb_data (sb, nvgl_comparison_op(cso->depth.func));
sb_data (sb, cso->depth.writemask ? 1 : 0);
sb_data (sb, cso->depth.enabled ? 1 : 0);
sb_method(sb, NV34TCL_ALPHA_FUNC_ENABLE, 3);
sb_data (sb, cso->alpha.enabled ? 1 : 0);
src/gallium/drivers/nvfx/nvfx_state_emit.c
+9 -1
View File
@@ -113,11 +113,19 @@ nvfx_state_validate_common(struct nvfx_context *nvfx)
etracer, neverball, foobillard, glest totally misrender
TODO: find the right fix
*/
if(dirty & (NVFX_NEW_VIEWPORT | NVFX_NEW_RAST | NVFX_NEW_ZSA) || (all_swizzled > 0))
if(dirty & (NVFX_NEW_VIEWPORT | NVFX_NEW_RAST | NVFX_NEW_ZSA) || (all_swizzled >= 0))
{
nvfx_state_viewport_validate(nvfx);
}
if(dirty & NVFX_NEW_ZSA || (all_swizzled >= 0))
{
WAIT_RING(chan, 3);
OUT_RING(chan, RING_3D(NV34TCL_DEPTH_WRITE_ENABLE, 2));
OUT_RING(chan, nvfx->framebuffer.zsbuf && nvfx->zsa->pipe.depth.writemask);
OUT_RING(chan, nvfx->framebuffer.zsbuf && nvfx->zsa->pipe.depth.enabled);
}
if(flush_tex_cache)
{
// TODO: what about nv30?
src/gallium/drivers/nvfx/nvfx_state_fb.c
+4
View File
@@ -252,6 +252,10 @@ nvfx_framebuffer_validate(struct nvfx_context *nvfx, unsigned prepare_result)
OUT_RING(chan, nvfx->hw_zeta.pitch);
}
}
else if(nvfx->is_nv4x) {
OUT_RING(chan, RING_3D(NV40TCL_ZETA_PITCH, 1));
OUT_RING(chan, 64);
}
OUT_RING(chan, RING_3D(NV34TCL_RT_ENABLE, 1));
OUT_RING(chan, rt_enable);