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ir3: improve validation, display for ldp instructions

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During validation, an ldp instruction should have all its three source
registers validated. For display, the half-type register name should be
displayed when applicable.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29875>
This commit is contained in:
Zan Dobersek
2024-08-06 09:19:57 +02:00
committed by Marge Bot
parent 55ac28954e
commit e30c329026
2 changed files with 7 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/freedreno/ir3/ir3_validate.c
+6
View File
@@ -411,6 +411,12 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr)
validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF));
break;
case OPC_LDP:
validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF));
validate_assert(ctx, !(instr->srcs[2]->flags & IR3_REG_HALF));
validate_reg_size(ctx, instr->dsts[0], instr->cat6.type);
break;
default:
validate_reg_size(ctx, instr->dsts[0], instr->cat6.type);
validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF));
src/freedreno/isa/ir3-cat6.xml
+1 -1
View File
@@ -356,7 +356,7 @@ SOFTWARE.
LoaD Private
</doc>
<display>
{SY}{JP}{NAME}.{TYPE} {DST}, p[{SRC}{OFF}], {SIZE}
{SY}{JP}{NAME}.{TYPE} {TYPE_HALF}{DST}, p[{SRC}{OFF}], {SIZE}
</display>
<pattern low="54" high="58">00010</pattern> <!-- OPC -->
</bitset>