From e30c329026dbf4171d3d93845862a3abd02f37f3 Mon Sep 17 00:00:00 2001 From: Zan Dobersek Date: Tue, 6 Aug 2024 09:19:57 +0200 Subject: [PATCH] ir3: improve validation, display for ldp instructions During validation, an ldp instruction should have all its three source registers validated. For display, the half-type register name should be displayed when applicable. Signed-off-by: Zan Dobersek Part-of: --- src/freedreno/ir3/ir3_validate.c | 6 ++++++ src/freedreno/isa/ir3-cat6.xml | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/src/freedreno/ir3/ir3_validate.c b/src/freedreno/ir3/ir3_validate.c index 59d369c0a20..53cce7477b2 100644 --- a/src/freedreno/ir3/ir3_validate.c +++ b/src/freedreno/ir3/ir3_validate.c @@ -411,6 +411,12 @@ validate_instr(struct ir3_validate_ctx *ctx, struct ir3_instruction *instr) validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF)); validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF)); break; + case OPC_LDP: + validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF)); + validate_assert(ctx, !(instr->srcs[1]->flags & IR3_REG_HALF)); + validate_assert(ctx, !(instr->srcs[2]->flags & IR3_REG_HALF)); + validate_reg_size(ctx, instr->dsts[0], instr->cat6.type); + break; default: validate_reg_size(ctx, instr->dsts[0], instr->cat6.type); validate_assert(ctx, !(instr->srcs[0]->flags & IR3_REG_HALF)); diff --git a/src/freedreno/isa/ir3-cat6.xml b/src/freedreno/isa/ir3-cat6.xml index 33336a9b4da..691caef169f 100644 --- a/src/freedreno/isa/ir3-cat6.xml +++ b/src/freedreno/isa/ir3-cat6.xml @@ -356,7 +356,7 @@ SOFTWARE. LoaD Private - {SY}{JP}{NAME}.{TYPE} {DST}, p[{SRC}{OFF}], {SIZE} + {SY}{JP}{NAME}.{TYPE} {TYPE_HALF}{DST}, p[{SRC}{OFF}], {SIZE} 00010