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ac: add ac_gpu_info::has_trap_handler_support

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31925>
This commit is contained in:
Samuel Pitoiset
2023-10-16 11:12:24 +02:00
committed by Marge Bot
parent b23cc8c1d3
commit e27ba67d33
2 changed files with 8 additions and 0 deletions
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7
src/amd/common/ac_gpu_info.c
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@@ -1092,6 +1092,12 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
info->uses_kernel_cu_mask = false; /* Not implemented in the kernel. */
info->has_graphics = info->ip[AMD_IP_GFX].num_queues > 0;
/* On GFX8, the TBA/TMA registers can be configured from the userspace.
* On GFX9+, they are privileged registers and they need to be configured
* from the kernel but it's not suppported yet.
*/
info->has_trap_handler_support = info->gfx_level == GFX8;
info->pa_sc_tile_steering_override = device_info.pa_sc_tile_steering_override;
info->max_render_backends = device_info.num_rb_pipes;
/* The value returned by the kernel driver was wrong. */
@@ -2010,6 +2016,7 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f)
}
fprintf(f, " has_tmz_support = %u\n", info->has_tmz_support);
fprintf(f, " has_trap_handler_support = %u\n", info->has_trap_handler_support);
for (unsigned i = 0; i < AMD_NUM_IP_TYPES; i++) {
if (info->max_submitted_ibs[i]) {
fprintf(f, " IP %-7s max_submitted_ibs = %u\n", ac_get_ip_type_string(info, i),

1
src/amd/common/ac_gpu_info.h
View File

@@ -234,6 +234,7 @@ struct radeon_info {
/* Whether SR-IOV is enabled or amdgpu.mcbp=1 was set on the kernel command line. */
bool register_shadowing_required;
bool has_tmz_support;
bool has_trap_handler_support;
bool kernel_has_modifiers;
/* If the kernel driver uses CU reservation for high priority compute on gfx10+, it programs