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radv: add missing L2 non-coherent image case for mipmaps with DCC/HTILE on GFX11

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According to PAL, an image with DCC/HTILE and mipmaps isn't coherent
with L2 when the mip level is in the metadata mip-tail region.

This fix isn't super optimal because the driver should rely on the
subresource range to determine if the mip level is in the mip-tail,
but it's easier to backport. Upcoming commits will optimize that.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11939
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31920>
This commit is contained in:
Samuel Pitoiset
2024-10-31 08:09:02 +01:00
committed by Marge Bot
parent c9ade8c3b5
commit b23cc8c1d3
1 changed files with 12 additions and 0 deletions
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12
src/amd/vulkan/radv_image.c
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@@ -929,6 +929,18 @@ radv_image_is_l2_coherent(const struct radv_device *device, const struct radv_im
if (pdev->info.gfx_level >= GFX12) {
return true; /* Everything is coherent with TC L2. */
} else if (pdev->info.gfx_level >= GFX10) {
/* Add a special case for mips in the metadata mip-tail for GFX11. */
if (pdev->info.gfx_level >= GFX11) {
if (image->vk.mip_levels > 1 && (radv_image_has_dcc(image) || radv_image_has_htile(image))) {
for (unsigned i = 0; i < image->plane_count; ++i) {
const struct radeon_surf *surf = &image->planes[i].surface;
if (surf->num_meta_levels != image->vk.mip_levels)
return false;
}
}
}
return !pdev->info.tcc_rb_non_coherent && !radv_image_is_pipe_misaligned(device, image);
} else if (pdev->info.gfx_level == GFX9) {
if (image->vk.samples == 1 &&