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radv: only reset SPM when cache counters are enabled with RGP

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Otherwise, it's not necessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38577>
This commit is contained in:
Samuel Pitoiset
2025-11-21 15:25:36 +01:00
committed by Marge Bot
parent 0cc4e16c70
commit e2644a1389
1 changed files with 4 additions and 3 deletions
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src/amd/vulkan/radv_sqtt.c
+4 -3
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@@ -498,9 +498,9 @@ radv_begin_sqtt(struct radv_queue *queue)
/* Enable SQG events that collects thread trace data. */
ac_emit_cp_spi_config_cntl(cs.b, pdev->info.gfx_level, true);
radv_perfcounter_emit_reset(&cs, true);
if (device->spm.bo) {
radv_perfcounter_emit_reset(&cs, true);
/* Enable all shader stages by default. */
radv_perfcounter_emit_shaders(device, &cs, ac_sqtt_get_shader_mask(&pdev->info));
@@ -580,7 +580,8 @@ radv_end_sqtt(struct radv_queue *queue)
/* Stop SQTT. */
radv_emit_sqtt_stop(device, &cs);
radv_perfcounter_emit_reset(&cs, true);
if (device->spm.bo)
radv_perfcounter_emit_reset(&cs, true);
/* Restore previous state by disabling SQG events. */
ac_emit_cp_spi_config_cntl(cs.b, pdev->info.gfx_level, false);