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tu: Use appropriate chip variants for VRS reg packing.

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38796>
This commit is contained in:
Emma Anholt
2025-12-02 12:22:04 -08:00
committed by Marge Bot
parent 08782fbdc3
commit d335232fe5
2 changed files with 6 additions and 6 deletions
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src/freedreno/vulkan/tu_clear_blit.cc
+1 -1
View File
@@ -1648,7 +1648,7 @@ r3d_setup(struct tu_cmd_buffer *cmd,
tu_cs_emit_regs(cs, GRAS_LRZ_DEPTH_BUFFER_INFO(CHIP));
tu_cs_emit_regs(cs, A6XX_RB_VRS_CONFIG());
tu_cs_emit_regs(cs, A7XX_SP_VRS_CONFIG());
tu_cs_emit_regs(cs, SP_VRS_CONFIG(CHIP));
tu_cs_emit_regs(cs, GRAS_VRS_CONFIG(CHIP));
}
src/freedreno/vulkan/tu_pipeline.cc
+5 -5
View File
@@ -3612,7 +3612,7 @@ tu6_emit_fragment_shading_rate(struct tu_cs *cs,
*/
if (!fsr || (!fs_reads_fsr && vk_fragment_shading_rate_is_disabled(fsr))) {
tu_cs_emit_regs(cs, A6XX_RB_VRS_CONFIG());
tu_cs_emit_regs(cs, A7XX_SP_VRS_CONFIG());
tu_cs_emit_regs(cs, SP_VRS_CONFIG(CHIP));
tu_cs_emit_regs(cs, GRAS_VRS_CONFIG(CHIP));
return;
}
@@ -3646,10 +3646,10 @@ tu6_emit_fragment_shading_rate(struct tu_cs *cs,
A6XX_RB_VRS_CONFIG(.unk2 = true, .pipeline_fsr_enable = enable_draw_fsr,
.attachment_fsr_enable = enable_att_fsr,
.primitive_fsr_enable = enable_prim_fsr));
tu_cs_emit_regs(
cs, A7XX_SP_VRS_CONFIG(.pipeline_fsr_enable = enable_draw_fsr,
.attachment_fsr_enable = enable_att_fsr,
.primitive_fsr_enable = enable_prim_fsr));
tu_cs_emit_regs(cs,
SP_VRS_CONFIG(CHIP, .pipeline_fsr_enable = enable_draw_fsr,
.attachment_fsr_enable = enable_att_fsr,
.primitive_fsr_enable = enable_prim_fsr));
tu_cs_emit_regs(
cs, GRAS_VRS_CONFIG(CHIP,
.pipeline_fsr_enable = enable_draw_fsr,