radv: Simplify IB2 workaround.
Move compute IB2 check to the winsys, because IB2 only works on GFX queues and not any other queue types. Then, simplify the workaround condition in the cmd buffer. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
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@@ -7503,20 +7503,13 @@ radv_CmdExecuteCommands(VkCommandBuffer commandBuffer, uint32_t commandBufferCou
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for (uint32_t i = 0; i < commandBufferCount; i++) {
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RADV_FROM_HANDLE(radv_cmd_buffer, secondary, pCmdBuffers[i]);
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bool allow_ib2 = true;
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if (secondary->device->physical_device->rad_info.gfx_level <= GFX7 &&
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secondary->state.uses_draw_indirect_multi) {
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/* Do not launch an IB2 for secondary command buffers that contain
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* DRAW_{INDEX}_INDIRECT_MULTI on GFX7 because it's illegal and hang the GPU.
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*/
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allow_ib2 = false;
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}
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if (secondary->qf == RADV_QUEUE_COMPUTE) {
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/* IB2 packets are not supported on compute queues according to PAL. */
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allow_ib2 = false;
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}
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/* Do not launch an IB2 for secondary command buffers that contain
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* DRAW_{INDEX}_INDIRECT_MULTI on GFX7 because it's illegal and hang the GPU.
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*/
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const bool allow_ib2 =
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!secondary->state.uses_draw_indirect_multi ||
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secondary->device->physical_device->rad_info.gfx_level >= GFX8;
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primary->scratch_size_per_wave_needed =
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MAX2(primary->scratch_size_per_wave_needed, secondary->scratch_size_per_wave_needed);
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@@ -648,7 +648,7 @@ radv_amdgpu_cs_execute_secondary(struct radeon_cmdbuf *_parent, struct radeon_cm
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struct radv_amdgpu_cs *parent = radv_amdgpu_cs(_parent);
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struct radv_amdgpu_cs *child = radv_amdgpu_cs(_child);
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struct radv_amdgpu_winsys *ws = parent->ws;
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bool use_ib2 = parent->use_ib && allow_ib2;
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const bool use_ib2 = parent->use_ib && allow_ib2 && parent->hw_ip == AMD_IP_GFX;
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if (parent->status != VK_SUCCESS || child->status != VK_SUCCESS)
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return;
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