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radv: delay lowering int64

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36936>
This commit is contained in:
Daniel Schürmann
2025-07-17 11:33:14 +02:00
committed by Marge Bot
parent eda8fc1e90
commit c82d70d3ec
1 changed files with 1 additions and 2 deletions
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src/amd/vulkan/radv_pipeline.c
+1 -2
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@@ -549,8 +549,6 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat
if (!radv_use_llvm_for_stage(pdev, stage->stage))
ac_nir_optimize_uniform_atomics(stage->nir);
NIR_PASS(_, stage->nir, nir_lower_int64);
NIR_PASS(_, stage->nir, nir_opt_idiv_const, 8);
NIR_PASS(_, stage->nir, nir_lower_idiv,
@@ -588,6 +586,7 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat
}
NIR_PASS(_, stage->nir, ac_nir_lower_global_access);
NIR_PASS(_, stage->nir, nir_lower_int64);
radv_optimize_nir_algebraic(
stage->nir, io_to_mem || lowered_ngg || stage->stage == MESA_SHADER_COMPUTE || stage->stage == MESA_SHADER_TASK,