pan/mdg: Fix mask usage when filling before a spill
Check the bytemask against 0xFFFF rather than 0xF so that the fill is
skipped for a .xyzw write rather than a .x write.
Set the mask on the store to 0xF when doing a read so that all
components are written back.
Fixes: 31d26ebf1b ("pan/mdg: Fill from TLS before spilling non-SSA nodes")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16382>
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@@ -946,10 +946,15 @@ mir_spill_register(
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} else {
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unsigned dest = spill_index++;
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if (write_count > 1 && mir_bytemask(ins) != 0xF) {
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unsigned bytemask = mir_bytemask(ins);
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unsigned write_mask = mir_from_bytemask(mir_round_bytemask_up(
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bytemask, 32), 32);
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if (write_count > 1 && bytemask != 0xFFFF) {
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midgard_instruction read =
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v_load_store_scratch(dest, spill_slot, false, 0xF);
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mir_insert_instruction_before_scheduled(ctx, block, ins, read);
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write_mask = 0xF;
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}
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ins->dest = dest;
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@@ -977,7 +982,7 @@ mir_spill_register(
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dest = spill_index++;
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midgard_instruction st =
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v_load_store_scratch(dest, spill_slot, true, ins->mask);
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v_load_store_scratch(dest, spill_slot, true, write_mask);
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mir_insert_instruction_after_scheduled(ctx, block, ins, st);
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if (move) {
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