ir3: fix display of dot-product instructions

For dp2acc and dp4acc, don't display the derived NOP value by default, but
do display repeat flags for source registers. When the nop encoding
condition is met, the derived NOP value should be shown, mirroring what the
base cat3 instruction specification does.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34076>

src/freedreno/ir3/tests/disasm.c

@@ -137,6 +137,7 @@ static const struct test {
    /* custom test with qcom_dot8 function from cl_qcom_dot_product8 */
    INSTR_6XX(66818c02_0002e003, "(sat)(nop3) dp2acc.mixed.low r0.z, r0.w, r0.w, r0.z"), /* (nop3) dp2acc (sat)r0.z, (signed)(low)(r)r0.w, (low)(r)r0.w, r0.z */
    INSTR_6XX(6681c802_8002a003, "(nop3) dp4acc.unsigned.low r0.z, r0.w, r0.w, (neg)r0.z"), /* (nop3) dp4acc r0.z, (unsigned)(r)r0.w, (r)r0.w, (neg)r0.z */
+   INSTR_6XX(7681c002_00002002, "(sy)dp4acc.unsigned.low r0.z, r0.z, r0.w, r0.x"),
 
    INSTR_7XX(61808000_04020400, "madsh.m16 r0.x, (last)r0.x, r0.y, (last)r0.z"),
    INSTR_7XX(64838806_04088406, "(nop3) sel.b32 r1.z, (last)r1.z, r1.w, (last)r2.x"),

src/freedreno/isa/ir3-cat3.xml

@@ -344,8 +344,14 @@ SOFTWARE.
 <bitset name="#instruction-cat3-dp" extends="#instruction-cat3-base">
 	<gen min="600"/>
 
+	<override expr="#cat2-cat3-nop-encoding">
+		<display>
+			{SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME}{SRC_SIGN}{SRC_PACK} {DST}, {SRC1}, {SRC2}, {SRC3_NEG}{SRC3_R}{SRC3}
+		</display>
+		<derived name="NOP" expr="#cat2-cat3-nop-value" type="uint"/>
+	</override>
 	<display>
-		{SY}{SS}{JP}{SAT}(nop{NOP}) {UL}{NAME}{SRC_SIGN}{SRC_PACK} {DST}, {SRC1}, {SRC2}, {SRC3_NEG}{SRC3}
+		{SY}{SS}{JP}{SAT}{UL}{NAME}{SRC_SIGN}{SRC_PACK} {DST}, {SRC1_R}{SRC1}, {SRC2_R}{SRC2}, {SRC3_NEG}{SRC3_R}{SRC3}
 	</display>
 
 	<derived name="FULL" expr="#true" type="bool"/>