radeonsi: use VS epilog for monolithic TES
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
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@@ -7179,6 +7179,7 @@ int si_compile_tgsi_shader(struct si_screen *sscreen,
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ctx.separate_prolog = !is_monolithic;
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if (ctx.type == PIPE_SHADER_VERTEX ||
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ctx.type == PIPE_SHADER_TESS_EVAL ||
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ctx.type == PIPE_SHADER_FRAGMENT) {
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ctx.no_prolog = false;
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ctx.no_epilog = false;
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@@ -7223,6 +7224,18 @@ int si_compile_tgsi_shader(struct si_screen *sscreen,
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si_build_wrapper_function(&ctx, parts, 1 + need_prolog + need_epilog,
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need_prolog ? 1 : 0);
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} else if (is_monolithic && ctx.type == PIPE_SHADER_TESS_EVAL &&
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!shader->key.tes.as_es) {
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LLVMValueRef parts[2];
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union si_shader_part_key epilog_key;
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parts[0] = ctx.main_fn;
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si_get_vs_epilog_key(shader, &shader->key.tes.epilog, &epilog_key);
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si_build_vs_epilog_function(&ctx, &epilog_key);
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parts[1] = ctx.main_fn;
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si_build_wrapper_function(&ctx, parts, 2, 0);
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} else if (is_monolithic && ctx.type == PIPE_SHADER_FRAGMENT) {
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LLVMValueRef parts[3];
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union si_shader_part_key prolog_key;
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