iris/anv: toggle on CACHE_MODE_0::MsaaFastClearEnabled on BMG G31

This increases rate of depth fast clear rate on BMG G31
per HSD 22020044224.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35966>
This commit is contained in:
Tapani Pälli
2025-07-04 17:46:02 +03:00
committed by Marge Bot
parent c65f5cd36d
commit ad2ef16198
2 changed files with 16 additions and 0 deletions

View File

@@ -1407,6 +1407,13 @@ iris_init_render_context(struct iris_batch *batch)
p.DX10OGLBorderModeforYCRCB = true;
p.DX10OGLBorderModeforYCRCBMask = true;
}
if (intel_device_info_is_bmg_g31(devinfo)) {
iris_emit_reg(batch, GENX(CACHE_MODE_0), reg) {
reg.MsaaFastClearEnabled = true;
reg.MsaaFastClearEnabledMask = true;
}
}
#endif
#if GFX_VER >= 30

View File

@@ -522,6 +522,15 @@ init_render_queue_state(struct anv_queue *queue, bool is_companion_rcs_batch)
#endif
}
#if GFX_VER == 20
if (intel_device_info_is_bmg_g31(devinfo)) {
anv_batch_write_reg(batch, GENX(CACHE_MODE_0), cm0) {
cm0.MsaaFastClearEnabled = true;
cm0.MsaaFastClearEnabledMask = true;
}
}
#endif
#if INTEL_NEEDS_WA_1806527549
/* Wa_1806527549 says to disable the following HiZ optimization when the
* depth buffer is D16_UNORM. We've found the WA to help with more depth