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anv/meta: Rewrite clear code

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Fixes Crucible test "func.clear.load-clear.attachments-8".

The old clear code, when clearing attachments for
VK_ATTACHMENT_LOAD_OP_CLEAR, suffered from some fundamental bugs. The
bugs were not fixable with the old code's approach.

    - It assumed that a VkRenderPass contained at most one depthstencil
       attachment.

    - It tried to clear all attachments (color and the sole
      depthstencil) with a single instanced draw call, using the VUE
      header's RenderTargetArrayIndex to specify the instance's target
      color attachment. But the RenderTargetArrayIndex does not select
      entries in the binding table; it only selects an array index of
      a singled layered surface.

    - If at least one attachment of VkRenderPass had
      VK_ATTACHMENT_LOAD_OP_CLEAR,
      then the old code cleared *all* attachments. This was
      a consequence of using a single draw call and single pipeline for
      the clear.

The new clear code fixes those bugs by making a separate draw call for
each attachment, and using one pipeline when clearing color attachments
and a different pipeline for depth attachments.

The new code, like the old code, does not clear stencil attachments. It
is left as a FINISHME.
This commit is contained in:
Chad Versace
2015-11-03 14:55:58 -08:00
parent 49c96a14c5
commit a9a3071fc4
4 changed files with 488 additions and 294 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/vulkan/anv_meta.c
+1 -3
View File
@@ -1303,9 +1303,7 @@ anv_device_init_meta(struct anv_device *device)
void
anv_device_finish_meta(struct anv_device *device)
{
/* Clear */
anv_DestroyPipeline(anv_device_to_handle(device),
device->meta_state.clear.pipeline);
anv_device_finish_meta_clear_state(device);
/* Blit */
anv_DestroyRenderPass(anv_device_to_handle(device),
src/vulkan/anv_meta_clear.c
+484 -290
View File
@@ -26,286 +26,140 @@
#include "anv_nir_builder.h"
#include "anv_private.h"
struct clear_instance_data {
/** Vertex attributes for color clears. */
struct color_clear_vattrs {
struct anv_vue_header vue_header;
float position[2]; /**< 3DPRIM_RECTLIST */
VkClearColorValue color;
};
/** Vertex attributes for depth clears. */
struct depth_clear_vattrs {
struct anv_vue_header vue_header;
float position[2]; /*<< 3DPRIM_RECTLIST */
};
static void
meta_emit_clear(struct anv_cmd_buffer *cmd_buffer,
int num_instances,
struct clear_instance_data *instance_data,
VkClearDepthStencilValue ds_clear_value)
meta_clear_begin(struct anv_meta_saved_state *saved_state,
struct anv_cmd_buffer *cmd_buffer)
{
struct anv_device *device = cmd_buffer->device;
struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
struct anv_state state;
uint32_t size;
anv_meta_save(saved_state, cmd_buffer,
(1 << VK_DYNAMIC_STATE_VIEWPORT) |
(1 << VK_DYNAMIC_STATE_SCISSOR));
const float vertex_data[] = {
/* Rect-list coordinates */
0.0, 0.0, ds_clear_value.depth,
fb->width, 0.0, ds_clear_value.depth,
fb->width, fb->height, ds_clear_value.depth,
/* Align to 16 bytes */
0.0, 0.0, 0.0,
};
size = sizeof(vertex_data) + num_instances * sizeof(*instance_data);
state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 16);
/* Copy in the vertex and instance data */
memcpy(state.map, vertex_data, sizeof(vertex_data));
memcpy(state.map + sizeof(vertex_data), instance_data,
num_instances * sizeof(*instance_data));
struct anv_buffer vertex_buffer = {
.device = cmd_buffer->device,
.size = size,
.bo = &device->dynamic_state_block_pool.bo,
.offset = state.offset
};
anv_CmdBindVertexBuffers(anv_cmd_buffer_to_handle(cmd_buffer), 0, 2,
(VkBuffer[]) {
anv_buffer_to_handle(&vertex_buffer),
anv_buffer_to_handle(&vertex_buffer)
},
(VkDeviceSize[]) {
0,
sizeof(vertex_data)
});
if (cmd_buffer->state.pipeline != anv_pipeline_from_handle(device->meta_state.clear.pipeline))
anv_CmdBindPipeline(anv_cmd_buffer_to_handle(cmd_buffer),
VK_PIPELINE_BIND_POINT_GRAPHICS,
device->meta_state.clear.pipeline);
ANV_CALL(CmdDraw)(anv_cmd_buffer_to_handle(cmd_buffer),
3, num_instances, 0, 0);
}
void
anv_cmd_buffer_clear_attachments(struct anv_cmd_buffer *cmd_buffer,
struct anv_render_pass *pass,
const VkClearValue *clear_values)
{
struct anv_meta_saved_state saved_state;
if (pass->has_stencil_clear_attachment)
anv_finishme("stencil clear");
/* FINISHME: Rethink how we count clear attachments in light of
* 0.138.2 -> 0.170.2 diff.
*/
if (pass->num_color_clear_attachments == 0 &&
!pass->has_depth_clear_attachment)
return;
struct clear_instance_data instance_data[pass->num_color_clear_attachments];
uint32_t color_attachments[pass->num_color_clear_attachments];
uint32_t ds_attachment = VK_ATTACHMENT_UNUSED;
VkClearDepthStencilValue ds_clear_value = {0};
int layer = 0;
for (uint32_t i = 0; i < pass->attachment_count; i++) {
const struct anv_render_pass_attachment *att = &pass->attachments[i];
if (anv_format_is_color(att->format)) {
if (att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
instance_data[layer] = (struct clear_instance_data) {
.vue_header = {
.RTAIndex = i,
.ViewportIndex = 0,
.PointWidth = 0.0
},
.color = clear_values[i].color,
};
color_attachments[layer] = i;
layer++;
}
} else {
if (att->format->depth_format &&
att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
assert(ds_attachment == VK_ATTACHMENT_UNUSED);
ds_attachment = i;
ds_clear_value = clear_values[ds_attachment].depthStencil;
}
if (att->format->has_stencil &&
att->stencil_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
anv_finishme("stencil clear");
}
}
}
anv_meta_save(&saved_state, cmd_buffer,
(1 << VK_DYNAMIC_STATE_VIEWPORT));
cmd_buffer->state.dynamic.viewport.count = 0;
struct anv_subpass subpass = {
.input_count = 0,
.color_count = pass->num_color_clear_attachments,
.color_attachments = color_attachments,
.depth_stencil_attachment = ds_attachment,
};
anv_cmd_buffer_begin_subpass(cmd_buffer, &subpass);
meta_emit_clear(cmd_buffer, pass->num_color_clear_attachments,
instance_data, ds_clear_value);
anv_meta_restore(&saved_state, cmd_buffer);
cmd_buffer->state.dynamic.scissor.count = 0;
}
static nir_shader *
build_nir_vertex_shader(void)
static void
meta_clear_end(struct anv_meta_saved_state *saved_state,
struct anv_cmd_buffer *cmd_buffer)
{
nir_builder b;
const struct glsl_type *vertex_type = glsl_vec4_type();
nir_builder_init_simple_shader(&b, MESA_SHADER_VERTEX);
nir_variable *pos_in = nir_variable_create(b.shader, nir_var_shader_in,
vertex_type, "a_pos");
pos_in->data.location = VERT_ATTRIB_GENERIC0;
nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out,
vertex_type, "gl_Position");
pos_in->data.location = VARYING_SLOT_POS;
nir_copy_var(&b, pos_out, pos_in);
/* Add one more pass-through attribute. For clear shaders, this is used
* to store the color and for blit shaders it's the texture coordinate.
*/
const struct glsl_type *attr_type = glsl_vec4_type();
nir_variable *attr_in = nir_variable_create(b.shader, nir_var_shader_in,
attr_type, "a_attr");
attr_in->data.location = VERT_ATTRIB_GENERIC1;
nir_variable *attr_out = nir_variable_create(b.shader, nir_var_shader_out,
attr_type, "v_attr");
attr_out->data.location = VARYING_SLOT_VAR0;
attr_out->data.interpolation = INTERP_QUALIFIER_FLAT;
nir_copy_var(&b, attr_out, attr_in);
return b.shader;
anv_meta_restore(saved_state, cmd_buffer);
}
static nir_shader *
build_nir_clear_fragment_shader(void)
static void
build_color_shaders(struct nir_shader **out_vs,
struct nir_shader **out_fs)
{
nir_builder b;
nir_builder vs_b;
nir_builder fs_b;
nir_builder_init_simple_shader(&vs_b, MESA_SHADER_VERTEX);
nir_builder_init_simple_shader(&fs_b, MESA_SHADER_FRAGMENT);
const struct glsl_type *position_type = glsl_vec4_type();
const struct glsl_type *color_type = glsl_vec4_type();
nir_builder_init_simple_shader(&b, MESA_SHADER_FRAGMENT);
nir_variable *vs_in_pos =
nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
"a_position");
vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
nir_variable *color_in = nir_variable_create(b.shader, nir_var_shader_in,
color_type, "v_attr");
color_in->data.location = VARYING_SLOT_VAR0;
color_in->data.interpolation = INTERP_QUALIFIER_FLAT;
nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out,
color_type, "f_color");
color_out->data.location = FRAG_RESULT_DATA0;
nir_copy_var(&b, color_out, color_in);
nir_variable *vs_out_pos =
nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
"gl_Position");
vs_out_pos->data.location = VARYING_SLOT_POS;
return b.shader;
nir_variable *vs_in_color =
nir_variable_create(vs_b.shader, nir_var_shader_in, color_type,
"a_color");
vs_in_color->data.location = VERT_ATTRIB_GENERIC1;
nir_variable *vs_out_color =
nir_variable_create(vs_b.shader, nir_var_shader_out, color_type,
"v_color");
vs_out_color->data.location = VARYING_SLOT_VAR0;
vs_out_color->data.interpolation = INTERP_QUALIFIER_FLAT;
nir_variable *fs_in_color =
nir_variable_create(fs_b.shader, nir_var_shader_in, color_type,
"v_color");
fs_in_color->data.location = vs_out_color->data.location;
fs_in_color->data.interpolation = vs_out_color->data.interpolation;
nir_variable *fs_out_color =
nir_variable_create(fs_b.shader, nir_var_shader_out, color_type,
"f_color");
fs_out_color->data.location = FRAG_RESULT_DATA0;
nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
nir_copy_var(&vs_b, vs_out_color, vs_in_color);
nir_copy_var(&fs_b, fs_out_color, fs_in_color);
*out_vs = vs_b.shader;
*out_fs = fs_b.shader;
}
void
anv_device_init_meta_clear_state(struct anv_device *device)
static struct anv_pipeline *
create_pipeline(struct anv_device *device,
struct nir_shader *vs_nir,
struct nir_shader *fs_nir,
const VkPipelineVertexInputStateCreateInfo *vi_state,
const VkPipelineDepthStencilStateCreateInfo *ds_state,
const VkPipelineColorBlendStateCreateInfo *cb_state)
{
struct anv_shader_module vsm = {
.nir = build_nir_vertex_shader(),
};
VkDevice device_h = anv_device_to_handle(device);
struct anv_shader_module fsm = {
.nir = build_nir_clear_fragment_shader(),
};
struct anv_shader_module vs_m = { .nir = vs_nir };
struct anv_shader_module fs_m = { .nir = fs_nir };
VkShader vs;
anv_CreateShader(anv_device_to_handle(device),
VkShader vs_h;
ANV_CALL(CreateShader)(device_h,
&(VkShaderCreateInfo) {
.sType = VK_STRUCTURE_TYPE_SHADER_CREATE_INFO,
.module = anv_shader_module_to_handle(&vsm),
.module = anv_shader_module_to_handle(&vs_m),
.pName = "main",
}, &vs);
VkShader fs;
anv_CreateShader(anv_device_to_handle(device),
&(VkShaderCreateInfo) {
.sType = VK_STRUCTURE_TYPE_SHADER_CREATE_INFO,
.module = anv_shader_module_to_handle(&fsm),
.pName = "main",
}, &fs);
/* We use instanced rendering to clear multiple render targets. We have two
* vertex buffers: the first vertex buffer holds per-vertex data and
* provides the vertices for the clear rectangle. The second one holds
* per-instance data, which consists of the VUE header (which selects the
* layer) and the color (Vulkan supports per-RT clear colors).
*/
VkPipelineVertexInputStateCreateInfo vi_create_info = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
.bindingCount = 2,
.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
{
.binding = 0,
.strideInBytes = 12,
.stepRate = VK_VERTEX_INPUT_STEP_RATE_VERTEX
},
{
.binding = 1,
.strideInBytes = 32,
.stepRate = VK_VERTEX_INPUT_STEP_RATE_INSTANCE
},
},
.attributeCount = 3,
.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
{
/* VUE Header */
.location = 0,
.binding = 1,
.format = VK_FORMAT_R32G32B32A32_UINT,
.offsetInBytes = 0
},
{
/* Position */
.location = 1,
.binding = 0,
.format = VK_FORMAT_R32G32B32_SFLOAT,
.offsetInBytes = 0
},
{
/* Color */
.location = 2,
.binding = 1,
.format = VK_FORMAT_R32G32B32A32_SFLOAT,
.offsetInBytes = 16
}
}
};
&vs_h);
anv_graphics_pipeline_create(anv_device_to_handle(device),
VkShader fs_h;
ANV_CALL(CreateShader)(device_h,
&(VkShaderCreateInfo) {
.sType = VK_STRUCTURE_TYPE_SHADER_CREATE_INFO,
.module = anv_shader_module_to_handle(&fs_m),
.pName = "main",
},
&fs_h);
VkPipeline pipeline_h;
anv_graphics_pipeline_create(device_h,
&(VkGraphicsPipelineCreateInfo) {
.sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
.stageCount = 2,
.pStages = (VkPipelineShaderStageCreateInfo[]) {
{
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_VERTEX,
.shader = vs,
.pSpecializationInfo = NULL
}, {
.shader = vs_h,
},
{
.sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
.stage = VK_SHADER_STAGE_FRAGMENT,
.shader = fs,
.pSpecializationInfo = NULL,
}
.shader = fs_h,
},
},
.pVertexInputState = &vi_create_info,
.pVertexInputState = vi_state,
.pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
.topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
@@ -314,47 +168,34 @@ anv_device_init_meta_clear_state(struct anv_device *device)
.pViewportState = &(VkPipelineViewportStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
.viewportCount = 1,
.pViewports = NULL, /* dynamic */
.scissorCount = 1,
.pScissors = NULL, /* dynamic */
},
.pRasterState = &(VkPipelineRasterStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_RASTER_STATE_CREATE_INFO,
.depthClipEnable = true,
.depthClipEnable = false,
.rasterizerDiscardEnable = false,
.fillMode = VK_FILL_MODE_SOLID,
.cullMode = VK_CULL_MODE_NONE,
.frontFace = VK_FRONT_FACE_CCW
.frontFace = VK_FRONT_FACE_CCW,
.depthBiasEnable = false,
.depthClipEnable = false,
},
.pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
.rasterSamples = 1,
.rasterSamples = 1, /* FINISHME: Multisampling */
.sampleShadingEnable = false,
.pSampleMask = (VkSampleMask[]) { UINT32_MAX },
},
.pDepthStencilState = &(VkPipelineDepthStencilStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
.depthTestEnable = true,
.depthWriteEnable = true,
.depthCompareOp = VK_COMPARE_OP_ALWAYS,
.depthBoundsTestEnable = false,
.stencilTestEnable = true,
.front = (VkStencilOpState) {
.stencilPassOp = VK_STENCIL_OP_REPLACE,
.stencilCompareOp = VK_COMPARE_OP_ALWAYS,
},
.back = (VkStencilOpState) {
.stencilPassOp = VK_STENCIL_OP_REPLACE,
.stencilCompareOp = VK_COMPARE_OP_ALWAYS,
},
},
.pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.attachmentCount = 1,
.pAttachments = (VkPipelineColorBlendAttachmentState []) {
{ .channelWriteMask = VK_CHANNEL_A_BIT |
VK_CHANNEL_R_BIT | VK_CHANNEL_G_BIT | VK_CHANNEL_B_BIT },
}
},
.pDepthStencilState = ds_state,
.pColorBlendState = cb_state,
.pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
/* The meta clear pipeline declares all state as dynamic.
* As a consequence, vkCmdBindPipeline writes no dynamic state
* to the cmd buffer. Therefore, at the end of the meta clear,
* we need only restore dynamic state was vkCmdSet.
*/
.sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
.dynamicStateCount = 9,
.pDynamicStates = (VkDynamicState[]) {
@@ -379,12 +220,377 @@ anv_device_init_meta_clear_state(struct anv_device *device)
.disable_vs = true,
.use_rectlist = true
},
&device->meta_state.clear.pipeline);
&pipeline_h);
anv_DestroyShader(anv_device_to_handle(device), vs);
anv_DestroyShader(anv_device_to_handle(device), fs);
ralloc_free(vsm.nir);
ralloc_free(fsm.nir);
ANV_CALL(DestroyShader)(device_h, vs_h);
ANV_CALL(DestroyShader)(device_h, fs_h);
ralloc_free(vs_nir);
ralloc_free(fs_nir);
return anv_pipeline_from_handle(pipeline_h);
}
static void
init_color_pipeline(struct anv_device *device)
{
struct nir_shader *vs_nir;
struct nir_shader *fs_nir;
build_color_shaders(&vs_nir, &fs_nir);
const VkPipelineVertexInputStateCreateInfo vi_state = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
.bindingCount = 1,
.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
{
.binding = 0,
.strideInBytes = sizeof(struct color_clear_vattrs),
.stepRate = VK_VERTEX_INPUT_STEP_RATE_VERTEX
},
},
.attributeCount = 3,
.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
{
/* VUE Header */
.location = 0,
.binding = 0,
.format = VK_FORMAT_R32G32B32A32_UINT,
.offsetInBytes = offsetof(struct color_clear_vattrs, vue_header),
},
{
/* Position */
.location = 1,
.binding = 0,
.format = VK_FORMAT_R32G32_SFLOAT,
.offsetInBytes = offsetof(struct color_clear_vattrs, position),
},
{
/* Color */
.location = 2,
.binding = 0,
.format = VK_FORMAT_R32G32B32A32_SFLOAT,
.offsetInBytes = offsetof(struct color_clear_vattrs, color),
},
},
};
const VkPipelineDepthStencilStateCreateInfo ds_state = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
.depthTestEnable = false,
.depthWriteEnable = false,
.depthBoundsTestEnable = false,
.stencilTestEnable = false,
};
const VkPipelineColorBlendStateCreateInfo cb_state = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.alphaToCoverageEnable = false,
.alphaToOneEnable = false,
.logicOpEnable = false,
.attachmentCount = 1,
.pAttachments = (VkPipelineColorBlendAttachmentState []) {
{
.blendEnable = false,
.channelWriteMask = VK_CHANNEL_A_BIT |
VK_CHANNEL_R_BIT |
VK_CHANNEL_G_BIT |
VK_CHANNEL_B_BIT,
},
},
};
device->meta_state.clear.color_pipeline =
create_pipeline(device, vs_nir, fs_nir, &vi_state, &ds_state,
&cb_state);
}
static void
emit_load_color_clear(struct anv_cmd_buffer *cmd_buffer,
uint32_t attachment,
VkClearColorValue clear_value)
{
struct anv_device *device = cmd_buffer->device;
VkCmdBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
VkPipeline pipeline_h =
anv_pipeline_to_handle(device->meta_state.clear.color_pipeline);
const struct color_clear_vattrs vertex_data[3] = {
{
.vue_header = { 0 },
.position = { 0.0, 0.0 },
.color = clear_value,
},
{
.vue_header = { 0 },
.position = { fb->width, 0.0 },
.color = clear_value,
},
{
.vue_header = { 0 },
.position = { fb->width, fb->height },
.color = clear_value,
},
};
struct anv_state state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, sizeof(vertex_data), 16);
memcpy(state.map, vertex_data, sizeof(vertex_data));
struct anv_buffer vertex_buffer = {
.device = device,
.size = sizeof(vertex_data),
.bo = &device->dynamic_state_block_pool.bo,
.offset = state.offset,
};
anv_cmd_buffer_begin_subpass(cmd_buffer,
&(struct anv_subpass) {
.color_count = 1,
.color_attachments = (uint32_t[]) { attachment },
.depth_stencil_attachment = VK_ATTACHMENT_UNUSED,
});
ANV_CALL(CmdSetViewport)(cmd_buffer_h, 1,
(VkViewport[]) {
{
.originX = 0,
.originY = 0,
.width = fb->width,
.height = fb->height,
.minDepth = 0.0,
.maxDepth = 1.0,
},
});
ANV_CALL(CmdSetScissor)(cmd_buffer_h, 1,
(VkRect2D[]) {
{
.offset = { 0, 0 },
.extent = { fb->width, fb->height },
}
});
ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
(VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
(VkDeviceSize[]) { 0 });
if (cmd_buffer->state.pipeline != device->meta_state.clear.color_pipeline) {
ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
pipeline_h);
}
ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
}
static void
build_depthstencil_shaders(struct nir_shader **out_vs,
struct nir_shader **out_fs)
{
nir_builder vs_b;
nir_builder fs_b;
nir_builder_init_simple_shader(&vs_b, MESA_SHADER_VERTEX);
nir_builder_init_simple_shader(&fs_b, MESA_SHADER_FRAGMENT);
const struct glsl_type *position_type = glsl_vec4_type();
nir_variable *vs_in_pos =
nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
"a_position");
vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
nir_variable *vs_out_pos =
nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
"gl_Position");
vs_out_pos->data.location = VARYING_SLOT_POS;
nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
*out_vs = vs_b.shader;
*out_fs = fs_b.shader;
}
static void
init_depth_pipeline(struct anv_device *device)
{
struct nir_shader *vs_nir;
struct nir_shader *fs_nir;
build_depthstencil_shaders(&vs_nir, &fs_nir);
const VkPipelineVertexInputStateCreateInfo vi_state = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
.bindingCount = 1,
.pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
{
.binding = 0,
.strideInBytes = sizeof(struct depth_clear_vattrs),
.stepRate = VK_VERTEX_INPUT_STEP_RATE_VERTEX
},
},
.attributeCount = 2,
.pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
{
/* VUE Header */
.location = 0,
.binding = 0,
.format = VK_FORMAT_R32G32B32A32_UINT,
.offsetInBytes = offsetof(struct depth_clear_vattrs, vue_header),
},
{
/* Position */
.location = 1,
.binding = 0,
.format = VK_FORMAT_R32G32_SFLOAT,
.offsetInBytes = offsetof(struct depth_clear_vattrs, position),
},
},
};
const VkPipelineDepthStencilStateCreateInfo ds_state = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
.depthTestEnable = true,
.depthCompareOp = VK_COMPARE_OP_ALWAYS,
.depthWriteEnable = true,
.depthBoundsTestEnable = false,
.stencilTestEnable = false,
};
const VkPipelineColorBlendStateCreateInfo cb_state = {
.sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
.alphaToCoverageEnable = false,
.alphaToOneEnable = false,
.logicOpEnable = false,
.attachmentCount = 0,
.pAttachments = NULL,
};
device->meta_state.clear.depth_pipeline =
create_pipeline(device, vs_nir, fs_nir, &vi_state, &ds_state,
&cb_state);
}
static void
emit_load_depth_clear(struct anv_cmd_buffer *cmd_buffer,
uint32_t attachment, float clear_value)
{
struct anv_device *device = cmd_buffer->device;
VkCmdBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
const struct depth_clear_vattrs vertex_data[3] = {
{
.vue_header = { 0 },
.position = { 0.0, 0.0 },
},
{
.vue_header = { 0 },
.position = { fb->width, 0.0 },
},
{
.vue_header = { 0 },
.position = { fb->width, fb->height },
},
};
struct anv_state state =
anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, sizeof(vertex_data), 16);
memcpy(state.map, vertex_data, sizeof(vertex_data));
struct anv_buffer vertex_buffer = {
.device = device,
.size = sizeof(vertex_data),
.bo = &device->dynamic_state_block_pool.bo,
.offset = state.offset,
};
anv_cmd_buffer_begin_subpass(cmd_buffer,
&(struct anv_subpass) {
.color_count = 0,
.depth_stencil_attachment = attachment,
});
ANV_CALL(CmdSetViewport)(cmd_buffer_h, 1,
(VkViewport[]) {
{
.originX = 0,
.originY = 0,
.width = fb->width,
.height = fb->height,
.minDepth = clear_value,
.maxDepth = clear_value,
},
});
ANV_CALL(CmdSetScissor)(cmd_buffer_h, 1,
(VkRect2D[]) {
{
.offset = { 0, 0 },
.extent = { fb->width, fb->height },
}
});
ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
(VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
(VkDeviceSize[]) { 0 });
if (cmd_buffer->state.pipeline != device->meta_state.clear.depth_pipeline) {
VkPipeline pipeline_h =
anv_pipeline_to_handle(device->meta_state.clear.depth_pipeline);
ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
pipeline_h);
}
ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
}
void
anv_device_init_meta_clear_state(struct anv_device *device)
{
init_color_pipeline(device);
init_depth_pipeline(device);
}
void
anv_device_finish_meta_clear_state(struct anv_device *device)
{
ANV_CALL(DestroyPipeline)(anv_device_to_handle(device),
anv_pipeline_to_handle(device->meta_state.clear.color_pipeline));
ANV_CALL(DestroyPipeline)(anv_device_to_handle(device),
anv_pipeline_to_handle(device->meta_state.clear.depth_pipeline));
}
void
anv_cmd_buffer_clear_attachments(struct anv_cmd_buffer *cmd_buffer,
struct anv_render_pass *pass,
const VkClearValue *clear_values)
{
struct anv_meta_saved_state saved_state;
meta_clear_begin(&saved_state, cmd_buffer);
for (uint32_t a = 0; a < pass->attachment_count; ++a) {
struct anv_render_pass_attachment *att = &pass->attachments[a];
if (anv_format_is_color(att->format)) {
if (att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
emit_load_color_clear(cmd_buffer, a, clear_values[a].color);
}
} else {
if (att->format->depth_format &&
att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
emit_load_depth_clear(cmd_buffer, a, clear_values[a].depthStencil.depth);
}
if (att->format->has_stencil &&
att->stencil_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
anv_finishme("stencil load clear");
}
}
}
meta_clear_end(&saved_state, cmd_buffer);
}
void anv_CmdClearColorImage(
@@ -399,9 +605,7 @@ void anv_CmdClearColorImage(
ANV_FROM_HANDLE(anv_image, image, _image);
struct anv_meta_saved_state saved_state;
anv_meta_save(&saved_state, cmd_buffer,
(1 << VK_DYNAMIC_STATE_VIEWPORT));
cmd_buffer->state.dynamic.viewport.count = 0;
meta_clear_begin(&saved_state, cmd_buffer);
for (uint32_t r = 0; r < rangeCount; r++) {
for (uint32_t l = 0; l < pRanges[r].mipLevels; l++) {
@@ -492,27 +696,17 @@ void anv_CmdClearColorImage(
.renderPass = pass,
.framebuffer = fb,
.clearValueCount = 1,
.pClearValues = NULL,
.pClearValues = (VkClearValue[]) {
{ .color = *pColor },
},
}, VK_RENDER_PASS_CONTENTS_INLINE);
struct clear_instance_data instance_data = {
.vue_header = {
.RTAIndex = 0,
.ViewportIndex = 0,
.PointWidth = 0.0
},
.color = *pColor,
};
meta_emit_clear(cmd_buffer, 1, &instance_data,
(VkClearDepthStencilValue) {0});
ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer));
}
}
}
anv_meta_restore(&saved_state, cmd_buffer);
meta_clear_end(&saved_state, cmd_buffer);
}
void anv_CmdClearDepthStencilImage(
src/vulkan/anv_meta_clear.h
+1
View File
@@ -30,6 +30,7 @@ extern "C" {
struct anv_device;
void anv_device_init_meta_clear_state(struct anv_device *device);
void anv_device_finish_meta_clear_state(struct anv_device *device);
#ifdef __cplusplus
}
src/vulkan/anv_private.h
+2 -1
View File
@@ -448,7 +448,8 @@ void anv_finish_wsi(struct anv_instance *instance);
struct anv_meta_state {
struct {
VkPipeline pipeline;
struct anv_pipeline *color_pipeline;
struct anv_pipeline *depth_pipeline;
} clear;
struct {