Revert "nir/lower_task_shader: don't use base index for shared memory intrinsics"
This reverts commit e5970fe22a.
Intel backend has implemented the missing functionality.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17618>
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Marge Bot
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66bc9aec65
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9f3eb63878
@@ -55,7 +55,8 @@ lower_nv_task_output(nir_builder *b,
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case nir_intrinsic_load_output: {
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b->cursor = nir_after_instr(instr);
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nir_ssa_def *load =
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nir_load_shared(b, 1, 32, nir_imm_int(b, s->task_count_shared_addr));
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nir_load_shared(b, 1, 32, nir_imm_int(b, 0),
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.base = s->task_count_shared_addr);
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, load);
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nir_instr_remove(instr);
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return true;
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@@ -64,7 +65,8 @@ lower_nv_task_output(nir_builder *b,
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case nir_intrinsic_store_output: {
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b->cursor = nir_after_instr(instr);
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nir_ssa_def *store_val = intrin->src[0].ssa;
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nir_store_shared(b, store_val, nir_imm_int(b, s->task_count_shared_addr));
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nir_store_shared(b, store_val, nir_imm_int(b, 0),
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.base = s->task_count_shared_addr);
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nir_instr_remove(instr);
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return true;
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}
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@@ -84,7 +86,7 @@ append_launch_mesh_workgroups_to_nv_task(nir_builder *b,
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*/
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b->cursor = nir_before_cf_list(&b->impl->body);
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nir_ssa_def *zero = nir_imm_int(b, 0);
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nir_store_shared(b, zero, nir_imm_int(b, s->task_count_shared_addr));
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nir_store_shared(b, zero, zero, .base = s->task_count_shared_addr);
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nir_scoped_barrier(b,
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.execution_scope = NIR_SCOPE_WORKGROUP,
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@@ -104,7 +106,7 @@ append_launch_mesh_workgroups_to_nv_task(nir_builder *b,
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.memory_modes = nir_var_mem_shared);
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nir_ssa_def *task_count =
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nir_load_shared(b, 1, 32, nir_imm_int(b, s->task_count_shared_addr));
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nir_load_shared(b, 1, 32, zero, .base = s->task_count_shared_addr);
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/* NV_mesh_shader doesn't offer to choose which task_payload variable
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* should be passed to mesh shaders, we just pass all.
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